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PDF IP3844 Data sheet ( Hoja de datos )

Número de pieza IP3844
Descripción CURRENT MODE REGULATING PULSE WIDTH MODULATORS
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No Preview Available ! IP3844 Hoja de datos, Descripción, Manual

SEME
LAB
IP1844 SERIES
IP1845 SERIES
TOP VIEW
COMP 1
8 VREF
VFB 2
7 VCC
ISENSE 3
6 OUTPUT
RT /CT 4
5 GROUND
J Package – 8 Pin Ceramic DIP
N Package – 8 Pin Plastic DIP
D-8 Package – 8 Pin Plastic (150) SOIC
TOP VIEW
COMP 1
N/C 2
VFB 3
N/C 4
ISENSE 5
N/C 6
RT /CT 7
14 VREF
13 N/C
12 VCC
11 VC
10 OUTPUT
9 GROUND
POWER
8
GROUND
CURRENT MODE
REGULATING
PULSE WIDTH
MODULATORS
FEATURES
• Guaranteed ±1% reference voltage tolerance
• Guaranteed ±10% frequency tolerance
• Low start–up current (<500 mA)
• Under voltage lockout with hysteresis
• Output state completely defined for all supply
and input conditions
• Interchangeable with UC1844 and UC1845
series for improved operation
• 500kHz Oscillator operation
250kHz Output operation
D-14 Package – 14 Pin Plastic (150) SOIC
Order Information
Part
Number
IP1844
IP2844
IP3844
IP1845
IP2845
IP3845
J–Pack N–Pack
8 Pin
8 Pin
D–8
8 Pin
D–14
14 Pin
Temp.
Range
-55 to +125°C
-25 to +85°C
0 to +70°C
-55 to +125°C
-25 to +85°C
0 to +70°C
Note:
To order, add the package identifier to the
part number.
eg. IP1844D–14
IP3845J
ABSOLUTE MAXIMUM RATINGS (Tcase = 25°C unless otherwise stated)
VCC Supply Voltage
(low impedance source)
(ICC < 30mA)
+30V
Self limiting
IO Output Current
±1A
Output Energy
(capacitive load)
5µJ
Analog Inputs
(pins 2 and 3)
Error Amp Output Sink Current
–0.3V to +VCC
10mA
PD
PD
PD
TSTG
TL
Power Dissipation
Derate @ Tamb > 50°C
Power Dissipation
Derate @ Tamb > 50°C
Power Dissipation
Derate @ Tcase > 25°C
Storage Temperature Range
Lead Temperature
Tamb = 25°C
Tcase = 25°C
Tcase = 25°C
J, N Packages
D Package
J, N Packages
(soldering, 10 seconds)
1W
10mW/°C
725mW
7.25mW/°C
2W
16mW/°C
–65 to 150°C
+300°C
Semelab plc. Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95

1 page




IP3844 pdf
SEME
LAB
IP1844 SERIES
IP1845 SERIES
APPLICATIONS INFORMATION
Oscillator Waveforms and Maximum Duty Cycle
V REF 8
RT CT 4
GND 5
RT
CT
LARGE R T
SMALL C T
SMALL R T
LARGE C T
V - Pin 4
(Pin 7 for 14 Pin D Package)
Internal Clock
Output – Max. Duty Cycle
V - Pin 6
(Pin 10 for 14 Pin D Package)
V - Pin 4
(Pin 7 for 14 Pin D Package)
Internal Clock
Output – Max. Duty Cycle
V - Pin 6
(Pin 10 for 14 Pin D Package)
Oscillator timing capacitor CT is charged by VREF through RT and discharged by an
internal current source. During the discharge time, the internal clock signal blanks the
output to the low state. Selection of RT and CT therefore determines both oscillator
frequency and maximum duty cycle.
Charge and discharge times are determined by the formulae:
tc 0.55 RTCT
( )td RTCT Rn
.0063 RT – 2.3
.0063 – 4
Resultant frequency
f
=
(tc
1
+
td)
For RT > 5k,
Resultant frequency
f
1.8
(RTCT)
Semelab plc. Telephone (01455) 556565. Telex: 341927. Fax (01455) 552612.
Prelim. 2/95

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