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PDF KS8995M Data sheet ( Hoja de datos )
| Número de pieza | KS8995M | |
| Descripción | 5 Port 10/100 Switch with PHY | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KS8995M (archivo pdf) en la parte inferior de esta página. Total 2 Páginas | ||
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KS8995 – 5 Port 10/100 Switch with PHY
Introduction
The KS8995 contains five 10/100 physical layer
transceivers, five MAC (Media Access Control) units
with an integrated layer 2 switch. The device runs in
two modes. The first mode is a five port integrated
switch and the second is as a five port switch with the
fifth port decoupled from the physical port. In this
mode access to the fifth MAC is provided using a
MII (Media Independent Interface).
Useful configurations include a stand alone five port
switch as well as a four port switch with a routing
element connected to the extra MII port. The
additional port is also useful for public network
interfacing.
The KS8995 is designed to reside in an unmanaged
design not requiring processor intervention. This is
achieved through I/O strapping at system reset time
On the media side, the KS8995 supports 10BaseT,
100BaseTX and 100BaseFX as specified by the IEEE
802.3 committee.
Physical signal transmission and reception are
enhanced through use of analog circuitry that makes
the design more efficient and allows for lower power
consumption and smaller chip die size.
• Unmanaged operation via strapping at system
reset time
• Hardware based 10/100, full/half, flow control
and auto negotiation
• Individual port forced modes (full duplex,
100BaseTX) when auto negotiation is disabled
• Wire speed reception and transmission
• Integrated address Look-Up Engine, supports 1K
absolute MAC addresses
• Automatic address learning, address aging and
address migration
• Broadcast storm protection
• Full duplex IEEE 802.3x flow control
• Half duplex back pressure flow control
• Comprehensive LED support
• External MAC interface (MII or SNI) for router
applications
Look Up
Engine
(1K Entries)
Queue
Management
Buffer
Management
SRAM
Buffers
FIFO and Flow Control
Highlights
• 5 port 10/100 Integrated Switch with Physical
Layer Transceivers
• SRAM on chip for frame buffering
• 1.4Gbps high performance memory bandwidth
• 10BaseT, 100BaseTX and 100BaseFX modes of
operation
• Superior analog technology for reduced power
and die size
• Single 2.5 V power supply
• 500 mA (1.25 W) including physical transmit
drivers
• 128 pin PQFP package
• Support for UTP or fiber installations
• Indicators for link, activity, full / half duplex and
speed
MAC
1
Physical
Transceiver
1
MAC
2
Physical
Transceiver
2
MAC
3
Physical
Transceiver
3
MAC
4
Physical
Transceiver
4
MAC
5
Physical
Transceiver
5
M
I
I
MII / SNI
(exclusive)
External
Interface
S
N
I
MRXD[3:0]
MRXDV
MCOL
MTXD[3:0]
MTXEN
MTXER
MII_CLK
MRXD[0]
MRXDV
MCOL
MTXD[0]
MTXEN
MII_CLK
LED
and
Programming
Interface
LED[1][3:0]
LED[2][3:0]
LED[3][3:0]
LED[4][3:0]
LED[5][3:0]
486 Mercury Drive, Sunnyvale, California 94086
Tel: (408) 735-1118 Fax: (408) 735-1119
www.kendin.com
1 page | ||
| Páginas | Total 2 Páginas | |
| PDF Descargar | [ Datasheet KS8995M.PDF ] | |
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