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PDF KM416C254D Data sheet ( Hoja de datos )
| Número de pieza | KM416C254D | |
| Descripción | 256K x 16Bit CMOS Dynamic RAM with Extended Data Out | |
| Fabricantes | Samsung semiconductor | |
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KM416C254D, KM416V254D
CMOS DRAM
256K x 16Bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
This is a family of 262,144 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time (-5,-6 or -7), power consumption(Normal or
Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-
only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode
DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consumption and high reli-
ability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
• Part Identification
- KM416C254D/DL (5V, 512 Ref.)
- KM416V254D/DL (3.3V, 512 Ref.)
• Active Power Dissipation
Speed
-5
-6
-7
3.3V(512 Ref.)
-
255
235
Unit : mW
5V(512 Ref.)
605
495
440
• Refresh Cycles
Part VCC Refresh
NO. cycle
C254D 5V
V254D 3.3V
512
Refresh period
Normal L-ver
8ms 128ms
• Performance Range
Speed
-5
-6
-7
tRAC
50ns
60ns
70ns
tCAC
15ns
15ns
20ns
tRC
84ns
104ns
124ns
tHPC
20ns
25ns
30ns
Remark
5V only
5V/3.3V
5V/3.3V
• Extended Data Out Mode operation
• 2 CAS Byte/Wrod Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 40-pin SOJ 400mil and 44(40)-pin
packages
• Triple +5V±10% power supply (5V product)
• Triple +3.3V±0.3V power supply (3.3V product)
FUNCTIONAL BLOCK DIAGRAM
RAS
UCAS
LCAS
W
A0~A8
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory Array
262,144 x16
Cells
Column Decoder
Vcc
Vss
Lower
Data in
Buffer
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
DQ0
to
DQ7
OE
DQ8
to
DQ15
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
1 page  
KM416C254D, KM416V254D
CMOS DRAM
CAPACITANCE (TA=25°C, VCC=5V or 3.3V, f=1MHz)
Parameter
Symbol
Input capacitance [A0 ~ A8]
CIN1
Input capacitance [RAS, UCAS, LCAS, W, OE]
CIN2
Output capacitance [DQ0 - DQ15]
CDQ
Min
-
-
-
AC CHARACTERISTICS (0°C≤TA≤70°C, See note 1,2)
Test condition (5V device) : VCC=5.0V±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V
Test condition (3.3V device) : VCC=3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-5*1
Min Max
-6
Min Max
Random read or write cycle time
tRC 84
104
Read-modify-write cycle time
tRWC
116
138
Access time from RAS
tRAC
50 60
Access time from CAS
Access time from column address
tCAC
tAA
15 15
25 30
CAS to output in Low-Z
tCLZ
3
3
Output buffer turn-off delay from CAS
tCEZ
3 13 3 13
Transition time (rise and fall)
tT 2 50 2 50
RAS precharge time
tRP 30
40
RAS pulse width
tRAS
50 10K 60 10K
RAS hold time
tRSH
15
15
CAS hold time
CAS pulse width
RAS to CAS delay time
tCSH
tCAS
tRCD
40 50
8 10K 10 10K
20 35 20 45
RAS to column address delay time
tRAD
15 25 15 30
CAS to RAS precharge time
tCRP
5
5
Row address set-up time
tASR
0
0
Row address hold time
tRAH
10
10
Column address set-up time
Column address hold time
tASC
tCAH
0
8
0
10
Column address to RAS lead time
Read command set-up time
Read command hold time referenced to CAS
tRAL
tRCS
tRCH
25
0
0
30
0
0
Read command hold time referenced to RAS tRRH
0
0
Write command set-up time
tWCS
0
0
Write command hold time
tWCH
10
10
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Note) *1 : 5V only
tWP
tRWL
tCWL
10
13
8
10
15
10
Max Units
5 pF
7 pF
7 pF
-7
Min Max
124
163
70
20
35
3
3 18
2 50
50
70 10K
20
60
15 10K
20 50
15 35
5
0
10
0
15
35
0
0
0
0
10
10
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
3,4,10
3,4,5
3,10
3
6,12
2
4
10
13
13
8
8
7
16
5 Page 
KM416C254D, KM416V254D
UPPER BYTE READ CYCLE
NOTE : DIN = OPEN
VIH -
RAS
VIL -
VIH -
UCAS
VIL -
VIH -
LCAS
VIL -
VIH -
A
VIL -
VIH -
W
VIL -
VIH -
OE
VIL -
DQ0 ~ DQ7
VOH -
VOL -
DQ8 ~ DQ15
VOH -
VOL -
tRAS
tRC
tCRP
tRCD
tCSH
tRSH
tCAS
tCRP
tRAD
tASR
tRAH
ROW
ADDRESS
tASC
tRCS
tCAH
COLUMN
ADDRESS
tRAL
tRAC
OPEN
tAA
tOEA
tOLZ
OPEN
tCAC
tCLZ
CMOS DRAM
tRP
tCRP
tRPC
tRRH
tRCH
tCEZ
tOEZ
DATA-OUT
Don′t care
Undefined
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KM416C254D.PDF ] | |
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