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PDF 61LV256 Data sheet ( Hoja de datos )
| Número de pieza | 61LV256 | |
| Descripción | 32K x 8 LOW VOLTAGE CMOS STATIC RAM | |
| Fabricantes | ETC | |
| Logotipo |  |
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IS61LV256
IS61LV256
32K x 8 LOW VOLTAGE CMOS STATIC RAM
ISSIISSI®®
FEBRUARY 1996
FEATURES
• High-speed access time: 12, 15, 20, 25 ns
• Automatic power-down when chip is deselected
• CMOS low power operation
— 345 mW (max.) operating
— 7 mW (max.) CMOS standby
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three-state outputs
DESCRIPTION
The ISSI IS61LV256 is a very high-speed, low power,
32,768-word by 8-bit static RAM. It is fabricated using ISSI's
high-performance CMOS technology. This highly reliable pro-
cess coupled with innovative circuit design techniques, yields
access times as fast as 12 ns maximum.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
50 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE). The active LOW Write Enable (WE) controls
both writing and reading of the memory.
The IS61LV256 is available in the JEDEC standard 28-pin,
300-mil DIP and SOJ, plus the 450-mil TSOP package.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
VCC
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
256 X 1024
MEMORY ARRAY
COLUMN I/O
CE
CONTROL
OE CIRCUIT
WE
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which
may appear in this publication. © Copyright 1996, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
Rev. F 0296
SR81995LV61
2-1
1 page  
IS61LV256
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
ADDRESS
DOUT
ISSI®
tRC
tOHA
tAA
tOHA
DATA VALID
READ CYCLE NO. 2(1,3)
ADDRESS
OE
CE
DOUT
SUPPLY
CURRENT
tRC
tAA
tACE
tLZCE
HIGH-Z
tDOE
tLZOE
tPU
50%
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
tOHA
tHZOE
tHZCE
DATA VALID
tPD
50%
ICC
ISB
Integrated Silicon Solution, Inc.
Rev. F 0296
SR81995LV61
2-5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 61LV256.PDF ] | |
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