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PDF IDT54FCT16543ETPF Data sheet ( Hoja de datos )

Número de pieza IDT54FCT16543ETPF
Descripción FAST CMOS 16-BIT LATCHED TRANSCEIVER
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



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No Preview Available ! IDT54FCT16543ETPF Hoja de datos, Descripción, Manual

Integrated Device Technology, Inc.
FAST CMOS
16-BIT LATCHED
TRANSCEIVER
IDT54/74FCT16543T/AT/CT/ET
IDT54/74FCT162543T/AT/CT/ET
FEATURES:
• Common features:
– 0.5 MICRON CMOS Technology
– High-speed, low-power CMOS replacement for
ABT functions
Typical tSK(o) (Output Skew) < 250ps
– Low input and output leakage 1µA (max.)
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack
– Extended commercial range of -40°C to +85°C
– VCC = 5V ±10%
• Features for FCT16543T/AT/CT/ET:
– High drive outputs (-32mA IOH, 64mA IOL)
– Power off disable outputs permit “live insertion”
– Typical VOLP (Output Ground Bounce) < 1.0V at
VCC = 5V, TA = 25°C
• Features for FCT162543T/AT/CT/ET:
– Balanced Output Drivers: ±24mA (commercial),
±16mA (military)
– Reduced system switching noise
– Typical VOLP (Output Ground Bounce) < 0.6V at
VCC = 5V,TA = 25°C
DESCRIPTION:
The FCT16543T/AT/CT/ET and FCT162543T/AT/CT/ET
16-bit latched transceivers are built using advanced dual metal
CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type latched transceiv-
ers with separate input and output control to permit indepen-
dent control of data flow in either direction. For example, the A-
to-B Enable (xCEAB) must be LOW in order to enter data from
the A port or to output data from the B port. xLEAB controls the
latch function. When xLEAB is LOW, the latches are transpar-
ent. A subsequent LOW-to-HIGH transition of xLEAB signal
puts the A latches in the storage mode. xOEAB performs output
enable function on the B port. Data flow from the B port to the
A port is similar but requires using xCEBA, xLEBA, and xOEBA
inputs. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved
noise margin.
The FCT16543T/AT/CT/ET are ideally suited for driving
high-capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability to
allow "live insertion" of boards when used as backplane drivers.
The FCT162543T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162543T/AT/CT/ET are plug-in replacements for the
FCT16543T/AT/CT/ET and 54/74ABT16543 for on-board bus
interface applications.
FUNCTIONAL BLOCK DIAGRAM
1OEBA
1CEBA
1LEBA
1OEAB
1CEAB
1LEAB
1A1
C
D
C
D
2OEBA
2CEBA
2LEBA
2OEAB
2CEAB
2LEAB
2A1
1B1
C
D 2B1
C
D
TO 7 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2618 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
5.12
TO 7 OTHER CHANNELS
2618 drw 02
SEPTEMBER 1996
DSC-2618/7
1

1 page




IDT54FCT16543ETPF pdf
IDT54/74FCT16543T/AT/CT/ET, 162543T/AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
ICC
ICCD
Quiescent Power Supply
Current TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
— 0.5 1.5
Dynamic Power Supply Current(4) VCC = Max., Outputs Open VIN = VCC
60
100
xCEAB and xOEAB = GND VIN = GND
xCEBA = VCC
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max., Outputs Open VIN = VCC
0.6
1.5
fi = 10MHz
VIN = GND
50% Duty Cycle
xLEAB, xCEAB and
xOEAB= GND
xCEBA = VCC
VIN = 3.4V
0.9
2.3
VIN = GND
One Bit Toggling
VCC = Max., Outputs Open
fi = 2.5MHz
50% Duty Cycle
xLEAB, xCEAB and
xOEAB= GND
xCEBA = VCC
Sixteen Bits Toggling
VIN = VCC
VIN = GND
VIN = 3.4V
VIN = GND
2.4 4.5(5)
6.4 16.5(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
Unit
mA
µA/
MHz
mA
2618 tbl 08
5.12 5

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