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PDF IDT54FCT533ADB Data sheet ( Hoja de datos )

Número de pieza IDT54FCT533ADB
Descripción FAST CMOS OCTAL TRANSPARENT LATCHES
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



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®
Integrated Device Technology, Inc.
FAST CMOS OCTAL
TRANSPARENT LATCHES
IDT54/74FCT373/A/C
IDT54/74FCT533/A/C
IDT54/74FCT573/A/C
FEATURES
• IDT54/74FCT373/533/573 equivalent to FASTspeed
and drive
• IDT54/74FCT373A/533A/573A up to 30% faster than
FAST
• Equivalent to FAST output drive over full temperature
and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• Octal transparent latch with 3-state output control
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT373 AND IDT54/74FCT573
D0 D1 D2
D3
DESCRIPTION
The IDT54/74FCT373/A/C, IDT54/74FCT533/A/C and
IDT54/74FCT573/A/C are octal transparent latches built us-
ing an advanced dual metal CMOS technology. These octal
latches have 3-state outputs and are intended for bus oriented
applications. The flip-flops appear transparent to the data
when Latch Enable (LE) is HIGH. When LE is LOW, the data
that meets the set-up time is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH, the
bus output is in the high-impedance state.
D4 D5 D6 D7
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
IDT54/74FCT533
D0
O0
D1
O1
D2
O2
D3
O3
D4
O4
D5
O5
D6
O6 O7
2602 cnv* 01
D7
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
D
O
G
LE
OE
O0 O1 O2 O3 O4 O5 O6 O7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.12
2602 cnv* 02
MAY 1992
DSC-4624/2
1

1 page




IDT54FCT533ADB pdf
IDT54/74FCT373/533/573/A/C
FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
Min. Typ.(2) Max. Unit
ICC
Quiescent Power Supply Current VCC = Max.
VIN VHC; V IN VLC
— 0.2 1.5 mA
ICC
Quiescent Power Supply Current VCC = Max.
TTL Inputs HIGH
VIN = 3.4V(3)
— 0.5 2.0 mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
OE = GND
VIN VHC
VIN VLC
— 0.15 0.25 mA/
MHz
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
VIN VHC
— 1.7 4.0 mA
Outputs Open
VIN VLC
fi = 10MHz
(FCT)
50% Duty Cycle
OE = GND
VIN = 3.4V
VIN = GND
— 2.0 5.0
LE = VCC
One Bit Toggling
VCC = Max.
VIN VHC
— 3.2 6.5(5)
Outputs Open
VIN VLC
fi = 2.5MHz
(FCT)
50% Duty Cycle
OE = GND
VIN = 3.4V
VIN = GND
— 5.2 14.5(5)
LE = VCC
Eight Bits Toggling
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
2602 tbl 04
7.12 5

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