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PDF IDT7026 Data sheet ( Hoja de datos )
| Número de pieza | IDT7026 | |
| Descripción | HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IDT7026 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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Integrated Device Technology, Inc.
HIGH-SPEED
16K x 16 DUAL-PORT
STATIC RAM WITH INTERRUPT
IDT70261S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Commercial: 20/25/35/55ns (max.)
• Low-power operation
— IDT70261S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT70261L
Active: 750mW (typ.)
Standby: 1mW (typ.)
• Separate upper-byte and lower-byte control for
multiplexed bus compatibility
• IDT70261 easily expands data bus width to 32 bits or
more using the Master/Slave select when cascading
more than one device
• M/S = H for BUSY output flag on Master,
M/S = L for BUSY input on Slave
• Busy and Interrupt Flags
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling
between ports
• Fully asynchronous operation from either port
• TTL-compatible, single 5V (±10%) power supply
• Available in 100-pin Thin Quad Plastic Flatpack
DESCRIPTION:
The IDT70261 is a high-speed 16K x 16 Dual-Port Static
RAM. The IDT70261 is designed to be used as a stand-alone
Dual-Port RAM or as a combination MASTER/SLAVE Dual-
Port RAM for 32-bit-or-more word systems. Using the IDT
MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider
memory system applications results in full-speed, error-free
FUNCTIONAL BLOCK DIAGRAM
R/WL
UBL
R/WR
UBR
LBL LBR
CEL CER
OEL OER
I/O8L-I/O 15L
I/O0L-I/O 7L
BUSYL(1,2)
I/O
Control
I/O
Control
A13L
A0L
Address
Decoder
MEMORY
ARRAY
Address
Decoder
CEL
OEL
R/ WL
14
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
14
CER
OER
R/WR
SEML
INTL(2)
M/S
NOTES:
1. (MASTER): BUSY is output; (SLAVE): BUSY is input.
2. BUSY and INT outputs are non-tri-stated push-pull.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.18
I/O8R-I/O 15R
I/O0R-I/O 7R
BUSYR(1,2)
A13R
A0R
SEMR
INTR(2)
3039 drw 01
OCTOBER 1996
DSC 3039/3
1
1 page  
IDT70261S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1) (VCC = 5.0V ± 10%)
Symbol
Parameter
ICC Dynamic Operating
Current
(Both Ports Active)
Test
Condition
CE = VIL, Outputs Open
SEM = VIH
f = fMAX(3)
Version
COM’L. S
L
70261X35
70261X55
Typ.(2) Max. Typ.(2) Max. Unit
160 295 150 270 mA
160 255 150 230
ISB1 Standby Current
(Both Ports — TTL
Level Inputs)
CER = CEL = VIH
SEMR = SEML = VIH
f = fMAX(3)
COM’L. S
L
20 85 13
20 60 13
ISB2 Standby Current
(One Port — TTL
Level Inputs)
ISB3 Full Standby Current
(Both Ports — All
CMOS Level Inputs)
ISB4 Full Standby Current
(One Port — All
CMOS Level Inputs)
CE CE"A" = VIL and "B" = VIH(5)
Active Port Outputs Open,
f = fMAX(3)
SEMR = SEML = VIH
Both Ports CEL and
CER > VCC - 0.2V
VIN > VCC - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VCC - 0.2V
CE"A" < 0.2V and
CE"B" > VCC - 0.2V(5)
SEMR = SEML > VCC - 0.2V
VIN > VC 265
VIN < 0.2V
Active Port Outputs Open,
f = fMAX(3)
COM’L. S
L
95 185 85
95 155 85
COM’L. S
L
1.0 15 1.0
0.2 5 0.2
COM’L. S
L
90 160 90
90 135 80
NOTES:
1. "X" in part numbers indicates power rating (S or L).
2. VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA (Typ.)
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/ tRC, and using
“AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
85 mA
60
165 mA
135
15 mA
5
135 mA
110
3039 tbl 10
6.18 5
5 Page 
IDT70261S/L
HIGH-SPEED 16K x 16 DUAL-PORT STATIC RAM WITH INTERRUPT
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(6)
IDT70261X20
IDT70261X25
Symbol
Parameter
BUSY TIMING (M/S = VIH)
tBAA BUSY Access Time from Address Match
tBDA BUSY Disable Time from Address Not Matched
tBAC BUSY Access Time from Chip Enable Low
tBDC BUSY Disable Time from Chip Enable High
tAPS Arbitration Priority Set-up Time(2)
tBDD BUSY Disable to Valid Data(3)
tWH Write Hold After BUSY(5)
BUSY TIMING (M/S = VIL)
tWB BUSY Input to Write(4)
tWH Write Hold After BUSY(5)
PORT-TO-PORT DELAY TIMING
tWDD
Write Pulse to Data Delay(1)
tDDD
Write Data Valid to Read Data Delay(1)
Min. Max. Min. Max. Unit
— 20 — 20 ns
— 20 — 20 ns
— 20 — 20 ns
— 17 — 17 ns
5 — 5 — ns
— 30 — 30 ns
15 — 17 — ns
0 — 0 — ns
15 — 17 — ns
— 45 — 50 ns
— 30 — 35 ns
IDT70261X35 IDT70261X55
Symbol
Parameter
BUSY TIMING (M/S = VIH)
tBAA BUSY Access Time from Address Match
tBDA BUSY Disable Time from Address Not Matched
tBAC BUSY Access Time from Chip Enable Low
tBDC BUSY Disable Time from Chip Enable High
tAPS Arbitration Priority Set-up Time(2)
tBDD BUSY Disable to Valid Data(3)
tWH Write Hold After BUSY(5)
Min. Max. Min. Max. Unit
— 20 — 45 ns
— 20 — 40 ns
— 20 — 40 ns
— 20 — 35 ns
5 — 5 — ns
— 35 — 40 ns
25 — 25 — ns
BUSY TIMING (M/S = VIL)
tWB BUSY Input to Write(4)
tWH Write Hold After BUSY(5)
0 — 0 — ns
25 — 25 — ns
PORT-TO-PORT DELAY TIMING
tWDD
Write Pulse to Data Delay(1)
— 60 — 80 ns
tDDD
Write Data Valid to Read Data Delay(1)
— 45 — 65 ns
NOTES:
3039 tbl 14
1. Port-to-port delay through RAM cells from writing port to reading port, refer to "Timing Wave form of Write with Port-to-Port Read and BUSY (M/S = VIH)".
2. To ensure that the earlier of the two ports wins.
3. tBDD is a calculated parameter and is the greater of 0, tWDD – tWP (actual), or tDDD – tDW (actual).
4. To ensure that the write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. "X" in part numbers indicates power rating (S or L).
6.18 11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet IDT7026.PDF ] | |
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