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PDF IDT7015 Data sheet ( Hoja de datos )
| Número de pieza | IDT7015 | |
| Descripción | HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Integrated Device Technology, Inc.
HIGH-SPEED
8K x 9 DUAL-PORT
STATIC RAM
IDT7015S/L
FEATURES:
• True Dual-Ported memory cells which allow simulta-
neous access of the same memory location
• High-speed access
— Military: 20/25/35ns (max.)
— Commercial: 12/15/17/20/25/35ns (max.)
• Low-power operation
— IDT7015S
Active: 750mW (typ.)
Standby: 5mW (typ.)
— IDT7015L
Active: 750mW (typ.)
Standby: 1mW (typ.)
• IDT7015 easily expands data bus width to 18 bits or
more using the Master/Slave select when cascading
more than one device
• M/S = H for BUSY output flag on Master
M/S = L for BUSY input on Slave
FUNCTIONAL BLOCK DIAGRAM
• Interrupt and Busy Flags
• On-chip port arbitration logic
• Full on-chip hardware support of semaphore signaling
between ports
• Fully asynchronous operation from either port
• Devices are capable of withstanding greater than 2001V
electrostatic discharge
• TTL-compatible, single 5V (±10%) power supply
• Available in ceramic 68-pin PGA, 68-pin PLCC, and an
80-pin TQFP
• Industrial temperature range (–40°C to +85°C) is avail-
able, tested to military electrical specifications
DESCRIPTION:
The IDT7015 is a high-speed 8K x 9 Dual-Port Static
RAMs. The IDT7015 is designed to be used as stand-alone
Dual-Port RAM or as a combination MASTER/SLAVE Dual-
Port RAM for 18-bit-or-more word systems. Using the IDT
OEL
WCEL
R/ L
OER
WCER
R/ R
I/O0L- I/O8L
BUSYL(1,2)
A12L
A0L
I/O
Control
I/O
Control
Address
Decoder
CEL
WOEL
R/ L
13
MEMORY
ARRAY
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
Address
Decoder
13
CER
WOER
R/ R
SEML
(2)
INTL
M/S
NOTES:
1. In MASTER mode: BUSY is an output and is a push-pull driver
In SLAVE mode: BUSY is input.
2. BUSY outputs and INT outputs are non-tri-stated push-pull drivers.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
6.12
I/O0R-I/O8R
BUSYR (1,2)
A12R
A0R
SEMR
(2)
INTR
2954 drw 01
OCTOBER 1996
DSC-2954/2
1
1 page  
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)
7015S
7015L
Symbol
|ILI|
|ILO|
Parameter
Input Leakage Current(1)
Output Leakage Current
Test Conditions
VCC = 5.5V, VIN = 0V to VCC
CE = VIH, VOUT = 0V to VCC
Min.
—
—
Max.
10
10
Min.
—
—
Max.
5
5
VOL Output Low Voltage
IOL = 4mA
— 0.4 — 0.4
VOH Output High Voltage
NOTE:
1. At Vcc < 2.0V, Input leakages are undefined.
IOH = -4mA
2.4 — 2.4 —
Unit
µA
µA
V
V
2954 tbl 08
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1) (VCC = 5.0V ± 10%)
Symbol
Parameter
ICC Dynamic Operating
Current
(Both Ports Active)
ISB1 Standby Current
(Both Ports — TTL
Level Inputs)
ISB2 Standby Current
(One Port — TTL
Level Inputs)
ISB3 Full Standby Current
(Both Ports — All
Test
Condition
CE = VIL, Outputs Open
SEM = VIH
f = fMAX(3)
CER = CEL = VIH
SEMR = SEML = VIH
f = fMAX(3)
CE CE"A"=VIL and "B" = VIH(5)
Active Port Outputs Open
f = fMAX(3)
SEMR = SEML = VIH
Both Ports CEL and
CER > VCC - 0.2V
Version
MIL.
S
L
COM’L. S
L
MIL.
S
L
COM’L. S
L
MIL.
S
L
COM’L. S
L
MIL.
S
L
7015X12
Com'l. Only
Typ.(2) Max.
——
——
170 325
170 275
——
——
25 70
25 60
——
——
105 200
105 170
——
——
7015X15
Com'l. Only
Typ.(2) Max.
——
——
170 310
170 260
——
——
25 60
25 50
——
——
105 190
105 160
——
——
7015X17
Com'l. Only
Typ.(2) Max. Unit
— — mA
——
170 310
170 260
— — mA
——
25 60
25 50
— — mA
——
105 190
109 160
— — mA
——
CMOS Level Inputs)
VIN > VCC - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VCC - 0.2V
COM’L.
S
L
1.0
0.2
15 1.0
5 0.2
15 1.0 15
5 0.2 5
ISB4 Full Standby Current CE"A"< 0.2V and
(One Port — All
CE"B" > VCC - 0.2V(5)
MIL.
S—
L—
——
——
— — — mA
— ——
CMOS Level Inputs) SEMR = SEML > VCC - 0.2V
VIN > VCC - 0.2V or
COM’L. S 100 180 100 170 100 170 mA
VIN < 0.2V
L 100 150 100 140 100 140
Active Port Outputs Open,
f = fMAX(3)
NOTES:
2954 tbl 09
1. "X" in part numbers indicates power rating (S or L).
2. VCC = 5V, TA = +25°C, and are not production tested. ICCDC = 120mA(typ.)
3. At f = fMAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite of port "A".
6.12 5
5 Page 
IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF SEMAPHORE READ AFTER WRITE TIMING, EITHER SIDE(1)
A0-A2
SEM
I/O
R/W
VALID ADDRESS
tAW
tEW
tWR
tDW
DATAIN
VALID
tAS tWP
tDH
tSAA
VALID ADDRESS
tACE
tOH
tSOP
DATAOUT
VALID(2)
tSWRD
OE
Write Cycle
Read Cycle
NOTES:
1. CE = VIH for the duration of the above timing (both write and read cycle).
2. "DATAOUT VALID" represents all I/O's (I/O0-I/O8) equal to the semaphore value.
tAOE
2954 drw 11
TIMING WAVEFORM OF SEMAPHORE WRITE CONTENTION(1,3,4)
A0"A"-A2 "A"
SIDE(2) "A"
WR/ "A"
MATCH
SEM"A"
A0"B"-A2 "B"
SIDE(2) "B"
WR/ "B"
tSPS
MATCH
SEM"B"
2954 drw 12
NOTES:
1. DOR = DOL =VIH, CER = CEL =VIH.
2. All timing is the same for left and right ports. Port “A” may be either left or right port. “B” is the opposite port from “A”.
3. This parameter is measured from WR/ "A" or SEM"A" going high to WR/ "B" or SEM"B" going High.
4. If tSPS is not satisfied, there is no guarantee which side will obtain the semaphore flag.
6.12 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet IDT7015.PDF ] | |
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