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PDF 74F114PC Data sheet ( Hoja de datos )
| Número de pieza | 74F114PC | |
| Descripción | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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April 1988
Revised August 1999
74F114
Dual JK Negative Edge-Triggered Flip-Flop
with Common Clocks and Clears
General Description
The 74F114 contains two high-speed JK flip-flops with
common Clock and Clear inputs. Synchronous state
changes are initiated by the falling edge of the clock. Trig-
gering occurs at a voltage level of the clock and is not
directly related to the transition time. The J and K inputs
can change when the clock is in either state without affect-
ing the flip-flop, provided that they are in the desired state
during the recommended setup and hold times relative to
the falling edge of the clock. A LOW signal on SD or CD
prevents clocking and forces Q or Q HIGH, respectively.
Simultaneous LOW signals on SD and CD force both Q and
Q HIGH.
Asynchronous Inputs:
LOW input to SD sets Q to HIGH level
LOW input to CD sets Q to LOW level
Clear and Set are independent of Clock
Simultaneous LOW on CD and SD
makes both Q and Q HIGH
Ordering Code:
Order Number Package Number
Package Description
74F114SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F114PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS009474
www.fairchildsemi.com
1 page  
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74F114PC.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74F114PC | Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears | Fairchild Semiconductor |
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