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PDF EM78P156E Data sheet ( Hoja de datos )
| Número de pieza | EM78P156E | |
| Descripción | 8-bit microprocessor with low-power and high-speed CMOS technology | |
| Fabricantes | ELAN Microelectronics Corp | |
| Logotipo |  |
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EM78P156E
I. GENERAL DESCRIPTION
EM78P156E is an 8-bit microprocessor with low-power and high-speed CMOS technology. There is a 1K*13-
bit Electrical One Time Programmable Read Only Memory (OTP-ROM) within it. It provides a PROTECTION
bit to prevent a user’s code from intruding as well as 7 OPTION bits to match the user’s requirements.
Because of the OTP-ROM, the EM78P156E offers users a convenient way to develop and verify their programs.
Moreover, a user’s developed code can be programmed easily by an EMC writer.
II. FEATURES
• Operating voltage range: 2.2V~5.5V
• Available in temperature range: 0°C~70°C
• Operating frequency range: DC ~ 36MHz
• Low power consumption:
* less than 1.6 mA at 5V/4MHz
* typical of 15 µA at 3V/32KHz
* typical of 1 µA during the sleep mode
• 1Kx13 bits on chip ROM
• One security register to prevent the code in the OTP memory from intruding
• One configuration register to match the user’s requirements
• 48x8 bits on chip registers (SRAM)
• 2 bi-directional I/O ports
• 5 level stacks for subroutine nesting
• 8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
• Two clocks per instruction cycle
• Power-down mode (SLEEP mode)
• Three available interruptions
* TCC overflow interrupt
* Input-port status changed interrupt (wake up from the sleep mode)
* External interrupt
• Programmable free running watchdog timer
• 8 pull-high pins
• 7 pull-down pins
• 8 open-drain pins
• Two R-option pins
• Package type: SOP, SOIC and DIP
• 99.9% single instruction cycle commands
* This specification is subject to be changed without notice. 8.11.1999
B3-1
1 page  
EM78P156E
4. R3 (Status Register)
7 6 5 4 3 21 0
GP2 GP1 GP0
T
P
Z DC
C
• Bit 0 (C)
Carry flag
• Bit 1 (DC)
Auxiliary carry flag
• Bit 2 (Z)
Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.
• Bit 3 (P)
Power-down bit. Set to 1 during power-on or by a “WDTC” command and reset to 0 by a
“SLEP” command.
• Bit 4 (T)
Time-out bit. Set to 1 by the “SLEP” and “WDTC” commands, or during power-up and reset
to 0 by WDT time-out.
• Bit 5~7 (GP0~2) General-purpose read/write bits.
5. R4 (RAM Select Register)
• Bits 0 ~ 5 are used to select registers (address: 00~06, 0F~3F) in the indirect addressing mode.
• Bits 6 ~ 7 are general-purpose read/write bits.
• See the configuration of the data memory in Fig.4.
6. R5 ~ R6 (Port 5 ~ Port 6)
• R5 and R6 are I/O registers.
• Only the lower 4 bits of R5 are available.
7. RF (Interrupt Status Register)
76 5 4
-- - -
32
10
-
EXIF
ICIF TCIF
• "1" means interrupt request, and "0" means non-interrupt occurence.
• Bit 0 (TCIF)
TCC overflowing interrupt flag. Set when TCC timer overflows, reset by software.
• Bit 1 (ICIF)
Port 6 input status changed interrupt flag. Set when Port 6 input changes, reset by software.
• Bit 2 (EXIF)
External interrupt flag. Set by falling edge on /INT pin, reset by software.
• Bits 3 ~ 7
Not used.
• RF can be cleared by instruction but can not be set.
• IOCF is the interrupt mask register.
• Note that the result of reading RF is the "logic AND" of RF and IOCF.
8. R10 ~ R3F
• All of these are the 8-bit general-purpose registers.
VI.2 Special Purpose Registers
1. A (Accumulator)
* This specification is subject to be changed without notice. 8.11.1999
B3-5
5 Page 
EM78P156E
PCRD
P61~P67
PORT
Q
P
R
D
CLK
QC
L
PCWR
0
M
1U
X
Q
P
R
D
CLK
QC
L
PDWR
PDRD
IOD
TIn
D
P
R
Q
CLK
C
L
Q
*Pull-high (down) and open-drain are not shown in the figure.
Fig. 7(b) The circuit of I/O port and I/O control register for P61~P67
IOCF.1
D
P
R
Q
CLK
CQ
L
TI0
TI1
TI7
VCC
RF.1
D
P
R
Q
CLK
CQ
L
Interrupt
ENI instruction
Q
P
R
D
CLK
Q
C
L
DISI instruction
/SLEP
Interrupt
(Wake-up from SLEEP)
Next Instruction
(Wake-up from SLEEP)
Fig. 7(c) Block diagram of I/O Port 6 with input changed interrupt/wake-up
* This specification is subject to be changed without notice. 8.11.1999
B3-11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet EM78P156E.PDF ] | |
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