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PDF EL8401 Data sheet ( Hoja de datos )

Número de pieza EL8401
Descripción 200MHz Rail-to-Rail Amplifiers
Fabricantes Intersil Corporation 
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®
Data Sheet
EL8200, EL8201, EL8401
September 1, 2004
FN7105.2
200MHz Rail-to-Rail Amplifiers
The EL8200, EL8201, and EL8401 represent rail-to-rail
amplifiers with a -3dB bandwidth of 200MHz and slew rate of
200V/µs. Running off a very low supply current of 2mA per
channel, the EL8200, EL8201, and EL8401 also feature
inputs that go to 0.15V below the VS- rail. The EL8200 and
EL8201 are dual channel amplifiers. The EL8401 is a quad
channel amplifier.
The EL8200 includes a fast-acting disable/power-down
circuit. With a 25ns disable and a 200ns enable, the EL8200
is ideal for multiplexing applications.
The EL8200, EL8201, and EL8401 are designed for a
number of general purpose video, communication,
instrumentation, and industrial applications. The EL8200 is
available in a 10-pin MSOP package, the EL8201 in an 8-pin
SO package, and the EL8401 in a 14-pin SO and 16-pin
QSOP packages. All are specified for operation over the
-40°C to +85°C temperature range.
Pinouts
EL8201
(8-PIN SO)
TOP VIEW
OUTA 1
INA- 2
INA+ 3
VS- 4
-
+
8 VS+
7 OUTB
6 INB-
-
+ 5 INB+
EL8401
(14-PIN SO)
TOP VIEW
OUTA 1
INA- 2
INA+ 3
VS+ 4
INB+ 5
INB- 6
OUTB 7
14 OUTD
A
-+
D
+-
13 IND-
12 IND+
11 VS-
10 INC+
-+ +-
BC
9 INC-
8 OUTC
Features
• 200MHz -3dB bandwidth
• 200V/µs slew rate
• Low supply current = 2mA per channel
• Supplies from 3V to 5.5V
• Rail-to-rail output
• Input to 0.15V below VS-
• Fast 25ns disable (EL8200 only)
• Low cost
• Pb-free available
Applications
• Video amplifiers
• Portable/hand-held products
• Communications devices
EL8200
(10-PIN MSOP)
TOP VIEW
INA+ 1
CEA 2
VS- 3
CEB 4
INB+ 5
10 INA-
-
+
9 OUTA
8 VS+
+
-
7 OUTB
6 INB-
EL8401
(16-PIN QSOP)
TOP VIEW
OUTA 1
INA- 2
INA+ 3
VS+ 4
INB+ 5
INB- 6
OUTB 7
NC 8
16 OUTD
- + + - 15 IND-
14 IND+
13 VS-
12 INC+
- + + - 11 INC-
10 OUTC
9 NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.

1 page




EL8401 pdf
Typical Performance Curves
EL8200, EL8201, EL8401
4
VS=5V
AV=1
2 RL=1k
CL=1.5pF
0
-2
-4
VOP-P=200mV
VOP-P=1V
VOP-P=2V
-6
100K
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS OUTPUT
VOLTAGE LEVELS
4
VS=5V
AV=1
2 CL=1.5pF
0
-2
-4
RL=330
RL=1k
RL=100
-6
100K
1M 10M 100M
FREQUENCY (Hz)
1G
FIGURE 2. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS RLOAD
4
VS=5V
RL=1k
2 CL=1.5pF
0
AV=2
AV=1
-2 AV=5
-4 AV=10
-6
100K
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS NON-INVERTING GAINS
4
VS=5V
RL=1k
2 CL=1.5pF
RF=1k
0
AV=-5
-2 AV=-10
-4
AV=-2
-6
100K
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 4. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS INVERTING GAINS
5
CL=10pF
3 CL=7pF
1 CL=5pF
-1 CL=1.5pF
VS=5V
-3
AV=1
RL=1k
VOP-P=200mV
-5
100K
1M
10M
100M
FREQUENCY (Hz)
1G
FIGURE 5. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
14
12 CL=56pF
10 CL=35pF
8
6
4
2
0 VS=5V
-2 AV=2
-4
RL=1k
RF=RG=1k
-6
100K
1M
CL=15pF
CL=1.5pF
10M
100M
1G
FREQUENCY (Hz)
FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE FOR
VARIOUS CL
5

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EL8401 arduino
EL8200, EL8201, EL8401
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds ±40mA. This limit is set by the design
of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL8200, EL8201
and EL8401, it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if the load conditions or package types need to be
modified for the amplifier to remain in the safe operating
area.
The maximum power dissipation allowed in a package is
determined according to:
PDMAX
=
T----J---M-----A----X----------T----A---M-----A----X--
θJA
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
PDMAX = VS × ISMAX + Σ(VS VOUTi) × V-----OR----UL----iT----i
For sinking:
PDMAX = VS × ISMAX + Σ(VOUTi VS-) × ILOADi
Where:
VS = Total supply voltage
ISMAX = Maximum quiescent supply current
VOUTi = Maximum output voltage of the application for
each channel
RLOADi = Load resistance tied to ground for each channel
ILOADi = Load current for each channel
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOADi to avoid the device
overheat.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as sort as possible. The power supply pin
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier’s inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
Typical Applications
VIDEO SYNC PULSE REMOVER
Many CMOS analog to digital converters have a parasitic
latch up problem when subjected to negative input voltage
levels. Since the sync tip contains no useful video
information and it is a negative going pulse, we can chop it
off. Figure 29 shows a gain of 2 connections. Figure 30
shows the complete input video signal applied at the input,
as well as the output signal with the negative going sync
pulse removed.
MULTIPLEXER
Besides the normal power down usage, the ENABLE pin of
the EL8200 can be used for multiplexing applications.
Figure 31 shows two channels with the outputs tied together,
driving a back terminated 75video load. A 2VP-P 2MHz
sine wave is applied to Amp A and a 1VP-P 2MHz sine wave
is applied to Amp B. Figure 32 shows the ENABLE signal
and the resulting output waveform at VOUT. Observe the
break-before-make operation of the multiplexing. Amp A is
on and VIN1 is passed through to the output when the
ENABLE signal is low and turns off in about 25ns when the
ENABLE signal is high. About 200ns later, Amp B turns on
and VIN2 is passed through to the output. The break-before-
make operation ensures that more than one amplifier isn’t
trying to drive the bus at the same time.
VIN
75
5V
+ VS+
-
VS-
75
VOUT
75
1K
1K
FIGURE 29. SYNC PULSE REMOVER
11

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