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PDF EL5410CRZ-T7 Data sheet ( Hoja de datos )

Número de pieza EL5410CRZ-T7
Descripción 30MHz Rail-to-Rail Input-Output Op Amps
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
EL5210, EL5410
December 22, 2004
FN7185.1
30MHz Rail-to-Rail Input-Output Op Amps
The EL5210 and EL5410 are low power, high voltage rail-to-
rail input-output amplifiers. The EL5210 contains two
amplifiers in one package and the EL5410 contains four
amplifiers. Operating on supplies ranging from 5V to 15V,
while consuming only 2.5mA per amplifier, the EL5410 and
EL5210 have a bandwidth of 30MHz (-3dB). They also
provide common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
The EL5410 and EL5210 also feature fast slewing and
settling times, as well as a high output drive capability of
30mA (sink and source). These features make these
amplifiers ideal for high speed filtering and signal
conditioning application. Other applications include battery
power, portable devices, and anywhere low power
consumption is important.
The EL5410 is available in a space-saving 14-Pin TSSOP
package, as well as the industry-standard 14-Pin SOIC. The
EL5210 is available in the 8-Pin MSOP and 8-Pin SOIC
packages. Both feature a standard operational amplifier pin
out. These amplifiers operate over a temperature range of
-40°C to +85°C.
Ordering Information
PART NUMBER PACKAGE TAPE & REEL PKG. DWG. #
EL5210CS
8-Pin SOIC
-
MDP0027
EL5210CS-T13 8-Pin SOIC
13”
MDP0027
EL5210CY
8-Pin MSOP
-
MDP0043
EL5210CY-T7 8-Pin MSOP
7”
MDP0043
EL5210CY-T13 8-Pin MSOP
13”
MDP0043
EL5410CS
14-Pin SOIC
-
MDP0027
EL5410CS-T7 14-Pin SOIC
7”
MDP0027
EL5410CS-T13 14-Pin SOIC
13”
MDP0027
EL5410CR
14-Pin TSSOP
-
MDP0044
EL5410CR-T7 14-Pin TSSOP
7”
MDP0044
EL5410CR-T13 14-Pin TSSOP
13”
MDP0044
EL5410CRZ
(See Note)
14-Pin TSSOP
(Pb-free)
-
MDP0044
EL5410CRZ-T7 14-Pin TSSOP
(See Note)
(Pb-free)
7”
MDP0044
EL5410CRZ- 14-Pin TSSOP
T13 (See Note)
(Pb-free)
13”
MDP0044
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
Features
• 30MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current (per amplifier) = 2.5mA
• High slew rate = 33V/µs
• Unity-gain stable
• Beyond the rails input capability
• Rail-to-rail output swing
• Available in both standard and space-saving fine pitch
packages
Pb-Free Available (RoHS Compliant)
Applications
• Driver for A-to-D Converters
• Data Acquisition
• Video Processing
• Audio Processing
• Active Filters
• Test Equipment
• Battery Powered Applications
• Portable Equipment
Pinouts
EL5410
(14-PIN TSSOP, SOIC)
TOP VIEW
EL5210
(8-PIN MSOP, SOIC)
TOP VIEW
VOUTA 1
14 VOUTD
VINA- 2
VINA+ 3
-
+
VS+ 4
VINB+ 5
VINB- 6
+
-
13 VIND-
- VOUTA 1
+ 12 VIND+
VINA- 2
11 VS-
10 VINC+
+
- 9 VINC-
VINA+ 3
VS- 4
-
+
8 VS+
7 VOUTB
- 6 VINB-
+
5 VINB+
VOUTB 7
8 VOUTC
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.

1 page




EL5410CRZ-T7 pdf
Typical Performance Curves
EL5210, EL5410
EL5410 Input Offset Voltage Distribution
500
VS=±5V
400 TA=25°C
Typical
Production
Distortion
300
200
100
0
Input Offset Voltage (mV)
Input Offset Voltage vs Temperature
5
4
3
2
1
0
-50 -10 30
70
Temperature (°C)
110
150
Output High Voltage vs Temperature
4.96
4.95
4.94
VS=±5V
IOUT=5mA
4.93
4.92
4.91
-50
-10 30 70 110
Temperature (°C)
150
EL5410 Input Offset Voltage Drift
25
VS=±5V
20
15
Typical
Production
Distortion
10
5
0
Input Offset Voltage Drift, TCVOS (µV/°C)
Input Bias Current vs Temperature
0.008
0.004
VS=±5V
0
-0.004
-0.008
-0.012
-50
-10 30 70 110
Temperature (°C)
150
Output Low Voltage vs Temperature
-4.85
-4.87
-4.89
VS=±5V
IOUT=5mA
-4.91
-4.93
-4.95
-50
-10 30 70 110
Temperature (°C)
150
5 FN7185.1
December 22, 2004

5 Page





EL5410CRZ-T7 arduino
EL5210, EL5410
when sourcing, and
PDMAX = Σi[VS × ISMAX + (VOUTi VS- ) × ILOADi ]
when sinking.
Where:
i = 1 to 2 for Dual and 1 to 4 for Quad
VS = Total Supply Voltage
ISMAX = Maximum Supply Current Per Amplifier
VOUTi = Maximum Output Voltage of the Application
ILOADi = Load current
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. Figure 3 and
Figure 4 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
simple matter to see if PDMAX exceeds the device's power
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves shown in
Figure 3 and Figure 4.
Packages Mounted on a JEDEC JESD51-7 High Effective
Thermal Conductivity Test Board
1200
1000
800
1.136W
1.0W
909mW
833mW
MAX TJ=125°C
600
SO8
θJA=110°C/W
400
MSOP8
200 θJA=115°C/W
SO14
θJA=88°C/W
TSSOP14
θJA=100°C/W
0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)
FIGURE 3. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
Packages Mounted on a JEDEC JESD51-3 Low Effective
Thermal Conductivity Test Board
1200
MAX TJ=125°C
1000
800 833mW
SO14
θJA=120°C/W
606mW
600
400 485mW
625mW
200 MSOP8
θJA=206°C/W
TSSOP14
θJA=165°C/W
SO8
θJA=160°C/W
0
0 25 50 75 85 100 125 150
Ambient Temperature (°C)
FIGURE 4. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
Driving Capacitive Loads
The EL5210 and EL5410 can drive a wide range of
capacitive loads. As load capacitance increases, however,
the -3dB bandwidth of the device will decrease and the
peaking increase. The amplifiers drive 10pF loads in parallel
with 1kwith just 1.2dB of peaking, and 100pF with 6.5dB of
peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5and 50) can be
placed in series with the output. However, this will obviously
reduce the gain slightly. Another method of reducing peaking
is to add a "snubber" circuit at the output. A snubber is a
shunt load consisting of a resistor in series with a capacitor.
Values of 150and 10nF are typical. The advantage of a
snubber is that it does not draw any DC load current or
reduce the gain.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5210 and EL5410 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to ground, a 0.1µF ceramic capacitor should be
placed from VS+ to pin to VS- pin. A 4.7µF tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used.
11 FN7185.1
December 22, 2004

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