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PDF EL4093CN Data sheet ( Hoja de datos )

Número de pieza EL4093CN
Descripción 300 MHz DC-Restored Video Amplifier
Fabricantes Elantec Semiconductor 
Logotipo Elantec Semiconductor Logotipo



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EL4093C
300 MHz DC-Restored Video Amplifier
Features
 High accuracy DC restoration for
video
 Low supply current of 9 5 mA
typ
 300 MHz bandwidth
 1500V ms slew rate
 0 04% differential gain and 0 02
differential phase into 150X for
NTSC
 1 5 mV max restored DC offset
 Sample and hold amplifier with
fast enable and low leakage
 TTL-compatible HOLD logic
input
Applications
 Input amplifier in video
equipment
 Restoration amplifier in video
mixers
Ordering Information
Part No Temp Range Package Outline
EL4093CN -40 C to a85 C 16-pin P-DIP MDP0031
EL4093CS -40 C to a85 C 16-Lead SOIC MDP0027
General Description
The EL4093C is a complete DC-restored video amplifier subsys-
tem featuring low power consumption and high slew rate It
contains a current feedback amplifier and a sample and hold
amplifier designed to stabilize video performance When the
HOLD logic input is low the sample and hold may be used as a
general purpose op amp to null the DC offset of the video am-
plifier When the HOLD input goes high the sample and hold
stores the correction voltage on the hold capacitor to maintain
DC correction during the subsequent video scan line
The sample and hold amplifier contains a current output stage
that greatly simplifies its connection to the video amplifier Its
high output impedance also helps to preserve video linearity at
low supply voltages For ease of interfacing the HOLD input is
TTL-compatible This device has an operational temperature of
b40 C to a85 C and is packaged in plastic 16-pin DIP and 16-
lead SOIC
Connection Diagram
Demo Board
A demo PCB is available for this
product Request ‘‘EL4093 Demo
Board ’’
44093 – 1
Note All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication however this data sheet cannot be a ‘‘controlled document’’ Current revisions if any to these
specifications are maintained at the factory and are available upon your request We recommend checking the revision level before finalization of your design documentation
1995 Elantec Inc

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EL4093CN pdf
EL4093C
300 MHz DC-Restored Video Amplifier
Typical Performance Curves
Non-inverting Frequency
Response (Gain)
Non-inverting Frequency
Response (Phase)
Frequency Response
for Various RL
Inverting Frequency
Response (Gain)
44093 – 4
Inverting Frequency
Response (Phase)
44093 – 5
44093 – 6
Frequency Response
for Various CL
44093 – 7
Frequency Response for
Various RF and RG
44093 – 8
Frequency Response
for Various CIN
44093 – 9
3 dB Bandwidth vs
Temperature (Video Amp)
44093 – 10
44093 – 11
5
44093 – 12

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EL4093CN arduino
EL4093C
300 MHz DC-Restored Video Amplifier
Applications Information Contd
Autozero Range
The autozero range is defined as the difference
between the input DC level and the reference
voltage to restore to The size of this range is a
function of the gain setting resistors used and the
S H output current swing For a gain of a2 the
optimum feedback resistor is 750X and the avail-
able S H output current is g5 5 mA minimum
To determine the autozero range for this case we
refer to Figure 3 below
Figure 3
4093 – 39
Suppose that the input DC level is aVDC and
that the reference voltage is 0V We know that in
feedback the following two conditions will exist
on the CFA first its output will be equal to 0V
(due to autozero) and second its VINb voltage
is equal to the VINa voltage (i e VINb e
aVDC) So we have a potential difference of
aVDC across both RF and RG resulting in a cur-
rent IRF e IRG e VDC 750X that must flow
into each of them This current IAZ e (IRF a
IRG) must come from the S H output Since the
maximum that IAZ can be is 5 5 mA we can solve
for VDC using the following
 JIAZ e g5 5 mA e 2
VDC
750X
and see that VDC e g2V This range can easily
accommodate most video signals
As another example consider the case where we
are restoring to a reference voltage of a0 75V
Using the same reasoning as above a current IRF
e (VDC b 0 75V) RF must flow through RF
and a current IRG e VDC RG must go into RG
Again our boundary condition is that IRF a IRG
s g5 5 mA and we can solve for the allowable
VDC values using the following
g5 5 mA e VDC b 0 75V a VDC
750X
750X
Hence VDC must be between a2 4V to b1 7V
This example illustrates that when the reference
changes the autozero range also changes In gen-
eral the user should determine the autozero
range for his her application and ensure that the
input signal is within this range during the au-
tozero period
Autozero Loop Bandwidth
The gain-bandwidth product (GBWP) of the au-
tozero loop is determined by the size of the hold
capacitor the value of RF and the transconduct-
ances (gm’s) of the S H amplifier To begin the
S H amplifier is modeled as in Figure 4 below
First the input stage transconductance is repre-
sented by gm1 with the compensation capacitor
given by CHOLD This stage’s GBWP is thus
gm1 (2q  CHOLD) e 1 (2q  (350X)(2 2 nF))
e 207 kHz Next since the S H has a current
output its output stage can be modeled as a
transconductance gm2 in this case having a val-
ue of 1 (500X) The current from gm2 then flows
through the I to V converter made up of the CFA
and RF to produce a voltage gain Thus the
GBWP of the overall loop is given by
gm1
GBWP e 2q  CHOLD (gm2  RF)
11

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