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PDF 5270 Data sheet ( Hoja de datos )

Número de pieza 5270
Descripción ACT5270 64-Bit Superscaler Microprocessor
Fabricantes Aeroflex Circuit Technology 
Logotipo Aeroflex Circuit Technology Logotipo



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No Preview Available ! 5270 Hoja de datos, Descripción, Manual

ACT5270
64-Bit Superscaler Microprocessor
Features
s Full militarized QED RM5270 microprocessor
s Dual Issue superscalar microprocessor - can issue one
integer and one floating-point instruction per cycle
q 133, 150, 200 MHz operating frequencies – Consult Factory for
latest speeds
q 260 Dhrystone2.1 MIPS
q SPECInt95 5.0, SPECfp95 5.3
s High performance system interface compatible with RM5260,
R4600, R4700 and R5000
q 64-bit multiplexed system address/data bus for optimum price/
performance with up to 100 MHz operating frequency
q High performance write protocols maximize uncached write
bandwidth
q Supports clock divisors (2, 3, 4, 5, 6, 7, 8)
q 5V compatible I/O’s
q IEEE 1149.1 JTAG boundary scan
s Integrated on-chip caches
q 16KB instruction - 2 way set associative
q 16KB data - 2 way set associative
q Virtually indexed, physically tagged
q Write-back and write-through on per page basis
q Pipeline restart on first double for data cache misses
s Integrated memory management unit
q Fully associative joint TLB (shared by I and D translations)
q 48 dual entries map 96 pages
q Variable page size (4KB to 16MB in 4x increments)
s Integrated secondary cache controller (R5000 compatible)
q Supports 512K or 2MByte block write-through secondary
s High-performance floating point unit
q Single cycle repeat rate for common single precision operations
and some double precision operations
q Two cycle repeat rate for double precision multiply and double
precision combined multiply-add operations
q Single cycle repeat rate for single precision combined multiply-
add operation
s MIPS IV instruction set
q Floating point multiply-add instruction increases performance in
signal processing and graphics applications
q Conditional moves to reduce branch frequency
q Index address modes (register + register)
s Embedded application enhancements
q Specialized DSP integer Multiply-Accumulate instruction and 3
operand multiply instruction
q I and D cache locking by set
q Optional dedicated exception vector for interrupts
s Fully static CMOS design with power down logic
q Standby reduced power mode with WAIT instruction
q 6 Watts typical at 3.3V 200 MHz
s 208-lead CQFP, cavity-up package (F17)
s 208-lead CQFP, inverted footprint (F24), Intended to duplicate
the commercial QED footprint
s 179-pin PGA package (Future Product) (P10)
BLOCK DIAGRAM
Preliminary
eroflex Circuit Technology – RISC TurboEngines For The Future © SCD5270 REV 1 12/22/98

1 page




5270 pdf
CIRCUIT TECHNOLOGY
Part Number
ACT-5270PC-133F17C
ACT-5270PC-150F17I
ACT-5270PC-200F17T
ACT-5270PC-200F17M
Sample Ordering Information
Screening
Commercial Temperature
Speed (MHz)
133
Industrial Temperature
Military Temperature
150
200
Military Screened
200
Package
208 Lead CQFP
208 Lead CQFP
208 Lead CQFP
208 Lead CQFP
Part Number Breakdown
Aeroflex Circuit
Technology
Base Processor Type
Cache Style
PC = Primary Cache
Maximum Pipeline Freq.
133 = 133MHz
150 = 150MHz
200 = 200MHz
ACT– 5270 PC –
200 F17 M
Screening
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
M = Military Temp, -55°C to +125°C, Screened *
Q = MIL-PRF-38534 Compliant/SMD if applicable
Package Type & Size
Surface Mount Package
F17 = 1.120" SQ 208 Lead CQFP
F24 = 1.120" SQ Inverted 208 Lead CQFP
Thru-Hole Package
P10 = 1.86"SQ PGA 179 pins with shoulder (Advanced)
* Screened to the individual test methods of MIL-STD-883
Specifications subject to change without notice.
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
www.aeroflex.com/act1.htm
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: (800) 843-1553
Aeroflex Circuit Technology
5 SCD5270 REV 1 12/22/98 Plainview NY (516) 694-6700

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