DataSheet.es    


PDF 5962-9095501MRA Data sheet ( Hoja de datos )

Número de pieza 5962-9095501MRA
Descripción DC-Coupled Demodulating 120 MHz Logarithmic Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



Hay una vista previa y un enlace de descarga de 5962-9095501MRA (archivo pdf) en la parte inferior de esta página.


Total 16 Páginas

No Preview Available ! 5962-9095501MRA Hoja de datos, Descripción, Manual

a
DC-Coupled Demodulating
120 MHz Logarithmic Amplifier
AD640*
FEATURES
Complete, Fully Calibrated Monolithic System
Five Stages, Each Having 10 dB Gain, 350 MHz BW
Direct Coupled Fully Differential Signal Path
Logarithmic Slope, Intercept and AC Response are
Stable Over Full Military Temperature Range
Dual Polarity Current Outputs Scaled 1 mA/Decade
Voltage Slope Options (1 V/Decade, 100 mV/dB, etc.)
Low Power Operation (Typically 220 mW at ؎5 V)
Low Cost Plastic Packages Also Available
APPLICATIONS
Radar, Sonar, Ultrasonic and Audio Systems
Precision Instrumentation from DC to 120 MHz
Power Measurement with Absolute Calibration
Wide Range High Accuracy Signal Compression
Alternative to Discrete and Hybrid IF Strips
Replaces Several Discrete Log Amp ICs
PRODUCT DESCRIPTION
The AD640 is a complete monolithic logarithmic amplifier. A single
AD640 provides up to 50 dB of dynamic range for frequencies
from dc to 120 MHz. Two AD640s in cascade can provide up to
95 dB of dynamic range at reduced bandwidth. The AD640 uses a
successive detection scheme to provide an output current propor-
tional to the logarithm of the input voltage. It is laser calibrated to
close tolerances and maintains high accuracy over the full military
temperature range using supply voltages from ±4.5 V to ± 7.5 V.
The AD640 comprises five cascaded dc-coupled amplifier/limiter
stages, each having a small signal voltage gain of 10 dB and a –3 dB
bandwidth of 350 MHz. Each stage has an associated full-wave
detector, whose output current depends on the absolute value of its
input voltage. The five outputs are summed to provide the video
output (when low-pass filtered) scaled at 1 mA per decade (50 µA
per dB). On chip resistors can be used to convert this output cur-
rent to a voltage with several convenient slope options. A balanced
signal output at +50 dB (referred to input) is provided to operate
AD640s in cascade.
The logarithmic response is absolutely calibrated to within ±1 dB
for dc or square wave inputs from ± 0.75 mV to ± 200 mV, with
an intercept (logarithmic offset) at 1 mV dc. An integral X10
attenuator provides an alternative input range of ± 7.5 mV to
± 2 V dc. Scaling is also guaranteed for sinusoidal inputs.
The AD640B is specified for the industrial temperature range of
–40°C to +85°C and the AD640T, available processed to MIL-
STD-883B, for the military range of –55°C to +125°C. Both are
available in 20-lead side-brazed ceramic DIPs or leadless chip
carriers (LCC). The AD640J is specified for the commercial
temperature range of 0°C to +70°C, and is available in both
20-lead plastic DIP (N) and PLCC (P) packages.
This device is now available to Standard Military Drawing
(DESC) number 5962-9095501MRA and 5962-9095501M2A.
PRODUCT HIGHLIGHTS
1. Absolute calibration of a wideband logarithmic amplifier is
unique. The AD640 is a high accuracy measurement device,
not simply a logarithmic building block.
2. Advanced design results in unprecedented stability over the
full military temperature range.
3. The fully differential signal path greatly reduces the risk of
instability due to inadequate power supply decoupling and
shared ground connections, a serious problem with com-
monly used unbalanced designs.
4. Differential interfaces also ensure that the appropriate ground
connection can be chosen for each signal port. They further
increase versatility and simplify applications. The signal input
impedance is ~500 kin shunt with ~2 pF.
5. The dc-coupled signal path eliminates the need for numerous
interstage coupling capacitors and simplifies logarithmic
conversion of subsonic signals.
(continued on page 4)
FUNCTIONAL BLOCK DIAGRAM
COM 18
RG1 1kRG0 1kRG2
17 16 15
LOG OUT LOG COM
14 13
INTERCEPT POSITIONING BIAS
12 +VS
ATN OUT 19
SIG +IN 20
SIG –IN 1
ATN LO 2
ATN COM 3
ATN COM 4
27
30
FULL-WAVE
DETECTOR
10dB
AMPLIFIER/LIMITER
270
5
ATN IN
6
BL1
*Protected under U.S. patent number 4,990,803.
FULL-WAVE
DETECTOR
FULL-WAVE
DETECTOR
FULL-WAVE
DETECTOR
FULL-WAVE
DETECTOR
10dB
10dB
10dB
10dB
AMPLIFIER/LIMITER AMPLIFIER/LIMITER AMPLIFIER/LIMITER AMPLIFIER/LIMITER
GAIN BIAS REGULATOR
7 SLOPE BIAS REGULATOR
–VS
11 SIG +OUT
10 SIG –OUT
9 BL2
8 ITC
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999

1 page




5962-9095501MRA pdf
1.015
1.010
1.005
1
0.995
0.990
0.985
0.980
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 1. Slope Current, IY vs.
Temperature
Typical DC Performance Characteristics–AD640
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 2. Intercept Voltage, VX, vs.
Temperature
1.006
1.004
1.002
1.000
0.998
0.996
0.994
4.5 5.0 5.5 6.0 6.5 7.0 7.5
POWER SUPPLY VOLTAGES – ؎ Volts
Figure 3. Slope Current, IY vs.
Supply Voltages
1.015
1.010
1.005
1.000
0.995
0.990
0.985
4.5 5.0 5.5 6.0 6.5 7.0 7.5
POWER SUPPLY VOLTAGES – ؎ Volts
Figure 4. Intercept Voltage, VX, vs.
Supply Voltages
14
13
12
11
10
9
8
7
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 5. Intercept Voltage (Using
Attenuator) vs. Temperature
+0.4
+0.3
+0.2
+0.1
INPUT OFFSET VOLTAGE
DEVIATION WILL BE WITHIN
SHADED AREA.
0
–0.1
–0.2
–0.3
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 6. Input Offset Voltage
Deviation vs. Temperature
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
0.1
2
1
0
1.0
10.0
100.0
INPUT VOLTAGE – mV
(EITHER SIGN)
1000.0
Figure 7. DC Logarithmic Transfer
Function and Error Curve for Single
AD640
2.5
2.0
1.5
1.0
0.5
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 8. Absolute Error vs. Tem-
perature, VIN = ؎1 mV to ؎100 mV
2.5
2.0
1.5
1.0
0.5
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 9. Absolute Error vs.
Temperature, Using Attenuator.
VIN = ؎10 mV to ؎1 V, Pin 8
Grounded to Disable ITC Bias
REV. C
–5–

5 Page





5962-9095501MRA arduino
AD640
IOUT = 50 µA (InputdBV + 60)
Equation (5)
Alternatively, for a sinusoidal input measured in dBm (power in
dB above 1 mW in a 50 system) the output can be written
IOUT = 50 µA (InputdBm + 44)
Equation (6)
because the intercept for a sine wave expressed in volts rms is at
1.414 mV (from Table I) or –44 dBm.
OPERATION OF A SINGLE AD640
Figure 24 shows the basic connections for a single device, using
100 load resistors. Output A is a negative going voltage with a
slope of –100 mV per decade; output B is positive going with a
slope of +100 mV per decade. For applications where absolute
calibration of the intercept is essential, the main output (from
LOG OUT, Pin 14) should be used; the LOG COM output can
then be grounded. To evaluate the demodulation response, a
simple low-pass output filter having a time constant of roughly
500 µs (3 dB corner of 320 Hz) is provided by a 4.7 µF (–20%
+80%) ceramic capacitor (Erie type RPE117-Z5U-475-K50V)
placed across the load. A DVM may be used to measure the
averaged output in verification tests. The voltage compliance at
Pins 13 and 14 extends from 0.3 V below ground up to 1 V
below +VS. Since the current into Pin 14 is from –0.2 mA at
zero signal to +2.3 mA when fully limited (dc input of >300 mV)
the output never drops below –230 mV. On the other hand, the
current out of Pin 13 ranges from 0.2 mA to +2.3 mA, and if
desired, a load resistor of up to 2 kcan be used on this output;
the slope would then be 2 V per decade. Use of the LOG COM
output in this way provides a numerically correct decibel read-
ing on a DVM (+100 mV = +1.00 dB).
Board layout is very important. The AD640 has both high gain
and wide bandwidth; therefore every signal path must be very
carefully considered. A high quality ground plane is essential,
but it should not be assumed that it behaves as an equipotential
plane. Even though the application may only call for modest
bandwidth, each of the three differential signal interface pairs
(SIG IN, Pins 1 and 20, SIG OUT, Pins 10 and 11, and LOG,
Pins 13 and 14) must have their own “starred” ground points to
avoid oscillation at low signal levels (where the gain is highest).
Unused pins (excluding Pins 8, 10 and 11) such as the attenua-
tor and applications resistors should be grounded close to the
package edge. BL1 (Pin 6) and BL2 (Pin 9) are internal bias
lines a volt or two above the –VS node; access is provided solely
for the addition of decoupling capacitors, which should be con-
nected exactly as shown (not all of them connect to the ground).
Use low impedance ceramic 0.1 µF capacitors (for example,
Erie RPE113-Z5U-105-K50V). Ferrite beads may be used
instead of supply decoupling resistors in cases where the supply
voltage is low.
Active Current-to-Voltage Conversion
The compliance at LOG OUT limits the available output volt-
age swing. The output of the AD640 may be converted to a
larger, buffered output voltage by the addition of an operational
amplifier connected as a current-to-voltage (transresistance)
stage, as shown in Figure 21. Using a 2 kfeedback resistor
(R2) the 50 µA/dB output at LOG OUT is converted to a volt-
age having a slope of +100 mV/dB, that is, 2 V per decade. This
output ranges from roughly –0.4 V for zero signal inputs to the
AD640, crosses zero at a dc input of precisely +1 mV (or
–1 mV) and is +4 V for a dc input of 100 mV. A passive
prefilter, formed by R1 and C1, minimizes the high frequency
energy conveyed to the op amp. The corner frequency is here
shown as 10 MHz. The AD844 is recommended for this appli-
cation because of its excellent performance in transresistance
modes. Its bandwidth of 35 MHz (with the 2 kfeedback resis-
tor) will exceed the baseband response of the system in most
applications. For lower bandwidth applications other op amps
and multipole active filters may be substituted (see, for example,
Figure 32 in the APPLICATIONS section).
Effect of Frequency on Calibration
The slope and intercept of the AD640 are calibrated during
manufacture using a 2 kHz square wave input. Calibration de-
pends on the gain of each stage being 10 dB. When the input
frequency is an appreciable fraction of the 350 MHz bandwidth
of the amplifier stages, their gain becomes imprecise and the
logarithmic slope and intercept are no longer fully calibrated.
However, the AD640 can provide very stable operation at fre-
quencies up to about one half the 3 dB frequency of the ampli-
fier stages. Figure 10 shows the averaged output current versus
input level at 30 MHz, 60 MHz, 90 MHz and 120 MHz. Fig-
ure 11 shows the absolute error in the response at 60 MHz and
at temperatures of –55°C, +25°C and +125°C. Figure 12 shows
the variation in the slope current, and Figure 13 shows the
variation in the intercept level (sinusoidal input) versus frequency.
If absolute calibration is essential, or some other value of slope
or intercept is required, there will usually be some point in the
user’s system at which an adjustment may be easily introduced.
For example, the 5% slope deficit at 30 MHz (see Figure 12)
may be restored by a 5% increase in the value of the load resis-
tor in the passive loading scheme shown in Figure 24, or by
inserting a trim potentiometer of 100 in series with the feed-
back resistor in the scheme shown in Figure 21. The intercept
SIGNAL
INPUT
DENOTES A SHORT, DIRECT CONNECTION
TO THE GROUND PLANE.
ALL UNMARKED CAPACITORS ARE
0.1F CERAMIC (SEE TEXT)
10
+5V
OPTIONAL
TERMINATION
RESISTOR
NC
20 19 18 17 16 15 14 13 12 11
SIG ATN CKT RG1 RG0 RG2 LOG LOG +VS SIG
+IN OUT COM
OUT COM
+OUT
1k1k
4.7F
RLA
100
0.1%
4.7F
AD640
SIG ATN ATN ATN ATN
SIG
–IN LO COM COM IN BL1 –VS ITC BL2 –OUT
1 2 3 4 5 6 7 8 9 10
NC NC
OPTIONAL
OFFSET BALANCE
RESISTOR
4.7
NC = NO CONNECT
–5V
Figure 24. Connections for a Single AD640 to Verify Basic Performance
OUTPUT A
OUTPUT B
RLB
100
0.1%
REV. C
–11–

11 Page







PáginasTotal 16 Páginas
PDF Descargar[ Datasheet 5962-9095501MRA.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
5962-9095501MRADC-Coupled Demodulating 120 MHz Logarithmic AmplifierAnalog Devices
Analog Devices

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar