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PDF DM7426 Data sheet ( Hoja de datos )

Número de pieza DM7426
Descripción Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! DM7426 Hoja de datos, Descripción, Manual

August 1986
Revised February 2000
DM7426
Quad 2-Input NAND Gates with
High Voltage Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where:
N1 (IOH) = total maximum output high current
for all outputs tied to pull-up resistor
N2 (IIH) = total maximum input high current for
all inputs tied to pull-up resistor
N3 (IIL) = total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number Package Number
Package Description
DM7426N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = AB
Inputs
AB
LL
LH
HL
HH
H = HIGH Logic Level
L = LOW Logic Level
Output
Y
H
H
H
L
© 2000 Fairchild Semiconductor Corporation DS006508
www.fairchildsemi.com

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