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PDF DM54LS469 Data sheet ( Hoja de datos )

Número de pieza DM54LS469
Descripción DM54LS469/DM74LS469 8-Bit Up/Down Counter
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! DM54LS469 Hoja de datos, Descripción, Manual

July 1989
DM54LS469 DM74LS469 8-Bit Up Down Counter
General Description
The ‘LS469 is an 8-bit synchronous up down counter with
parallel load and hold capability Three function-select in-
puts (LD UD CBI) provide one of four operations which
occur synchronously on the rising edge of the clock (CK)
The LOAD operation loads the inputs (D7 – D0) into the out-
put register (Q7 – Q0) The HOLD operation holds the previ-
ous value regardless of clock transitions The INCREMENT
operation adds one to the output register when the carry-in
input is TRUE (CBIeLOW) otherwise the operation is a
HOLD The carry-out (CBO) is TRUE (CBOeLOW) when
the output register (Q7 – Q0) is all HIGHs otherwise FALSE
(CBOeHIGH) The DECREMENT operation subtracts one
from the output register when the borrow-in input is TRUE
(CBIeLOW) otherwise the operation is a HOLD The bor-
row-out (CBO) is TRUE (CBOeLOW) when the output reg-
ister (Q7 – Q0) is all LOWs otherwise FALSE (CBOeHIGH)
The output register (Q7 – Q0) is enabled when OE is LOW
and disabled (HI-Z) when OE is HIGH The output drivers
will sink the 24 mA required for many bus-interface stan-
dards Two or more ‘LS469 octal up down counters may be
cascaded to provide larger counters
Features Benefits
Y 8-bit up down counter for microprogram-counter DMA
controller and general-purpose counting applications
Y 8 bits matches byte boundaries
Y Bus-structured pinout
Y 24-pin SKINNYDIP saves space
Y TRI-STATE outputs drive bus lines
Y Low current PNP inputs reduce loading
Y Expandable in 8-bit increments
Connection Diagram
Top View
Standard Test Load
TL L 8333 – 3
TL L 8333 – 1
Order Number DM54LS469J
DM74LS469J or DM74LS469N
See NS Package Number J24F or N24C
Function Table
OE CK LD UD CBI D7 – D0 Q7 – Q0 Operation
HXXX X
LuL X X
L uH L H
L uH L L
L uH H H
L uH H L
XZ
HI-Z
DD
LOAD
XQ
HOLD
X Q plus 1 INCREMENT
XQ
HOLD
X Q minus 1 DECREMENT
TRI-STATE is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL L 8333
RRD-B30M115 Printed in U S A

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