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PDF FQU18N20V2 Data sheet ( Hoja de datos )
| Número de pieza | FQU18N20V2 | |
| Descripción | 200V N-Channel MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FQD18N20V2 / FQU18N20V2
200V N-Channel MOSFET
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, high
efficiency switching for DC/DC converters, and DC motor
control.
Features
• 15A, 200V, RDS(on) = 0.14Ω @VGS = 10 V
• Low gate charge ( typical 20 nC)
• Low Crss ( typical 25 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQD18N20V2 / FQU18N20V2
200
15
9.75
60
± 30
340
15
8.3
6.5
2.5
83
0.67
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
Parameter
RθJC
Thermal Resistance, Junction-to-Case
RθJA
Thermal Resistance, Junction-to-Ambient *
RθJA
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
Typ Max Units
-- 1.5 °C/W
-- 50 °C/W
-- 110 °C/W
©2002 Fairchild Semiconductor Corporation
Rev. B1, August 2002
1 page  
Gate Charge Test Circuit & Waveform
Same Type
50KΩ
as DUT
12V 200nF
300nF
VGS
10V
Qg
VGS
VDS
Qgs Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
10V
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
10V
tp
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS
=
--1--
2
L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2002 Fairchild Semiconductor Corporation
Rev. B1, August 2002
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet FQU18N20V2.PDF ] | |
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