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PDF FQA24N50 Data sheet ( Hoja de datos )
| Número de pieza | FQA24N50 | |
| Descripción | 500V N-Channel MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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June 2014
FQA24N50
N-Channel QFET® MOSFET
500 V, 24 A, 200 mΩ
Features
• 24 A, 500 V, RDS(on) = 200 mΩ (Max.) @ VGS = 10 V, ID = 12 A
• Low Gate Charge (Typ. 90 nC)
• Low Crss (Typ. 55 pF)
• 100% Avalanche Tested
• RoHS compliant
Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche
and commutation mode. These devices are well suited for high
efficiency switch mode power supply, power factor correction,
electronic lamp ballast based on half bridge.
D
G
DS
TO-3PN
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol
Parameter
VDSS
ID
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
IDM Drain Current - Pulsed
(Note 1)
VGSS
EAS
IAR
EAR
dv/dt
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
(Note 2)
(Note 1)
(Note 1)
(Note 3)
PD Power Dissipation (TC = 25°C)
- Derate above 25°C
TJ, TSTG
TL
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8" from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθCS
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink
Thermal Resistance, Junction-to-Ambient
G
S
FQA24N50
500
24
15.2
96
± 30
1100
24
29
4.5
290
2.33
-55 to +150
300
Typ.
--
0.24
--
Max.
0.43
--
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
°C/W
©2000 Fairchild Semiconductor Corporation
FQA24N50 Rev. C0
1
www.fairchildsemi.com
1 page  
Figure 12. Gate Charge Test Circuit & Waveform
Same Type
50KΩ as DUT
12V 200nF
300nF
VGS
10V
VGS
VDS
Qgs
IG = co3nmsAt.
DUT
Qg
Qgd
Charge
V10GVS
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
V1G0GVSS
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VDS
ID
RG
L
EAS = --21-- L IAS2
BVDSS
--------------------
BVDSS - VDD
BVDSS
IAS
VDD ID (t)
DUT
VDD
VDS (t)
t p Time
©2000 Fairchild Semiconductor Corporation
FQA24N50 Rev. C0
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet FQA24N50.PDF ] | |
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