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PDF FN9012 Data sheet ( Hoja de datos )
| Número de pieza | FN9012 | |
| Descripción | Microprocessor CORE Voltage Regulator Two-Phase Buck PWM Controller | |
| Fabricantes | Intersil Corporation | |
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TM
Data Sheet
ISL6562
March 2001
File Number 9012
Microprocessor CORE Voltage Regulator
Two-Phase Buck PWM Controller
The ISL6562 two-phase current mode, PWM control IC
together with companion gate drivers, the HIP6601A,
HIP6602A, HIP6603A or HIP6604 and MOSFETs provides a
precision voltage regulation system for advanced
microprocessors. Two-phase power conversion is a marked
departure from earlier single phase converter configurations
previously employed to satisfy the ever increasing current
demands of modern microprocessors. Multi-phase
converters, by distributing the power and load current results
in smaller and lower cost transistors with fewer input and
output capacitors. These reductions accrue from the higher
effective conversion frequency with higher frequency ripple
current due to the phase interleaving process of this
topology. For example, a two phase converter operating at
350kHz per phase will have a ripple frequency of 700kHz.
Moreover, greater converter bandwidth of this design results
in faster response to load transients.
Outstanding features of this controller IC include
programmable VID codes from the microprocessor that
range from 1.050V to 1.825V with an accuracy of ±0.8%.
Pull up currents on these VID pins eliminates the need for
external pull up resistors.
Another feature of this controller IC is the PWRGD monitor
circuit which is held low until the CORE voltage increases, to
within 18% of the programmed voltage. Over-voltage, 24%
above programmed CORE voltage, results in the PWRGD
output going low to indicate that the CORE is above the
specified limit. Under voltage is also detected and results in
PWRGD going low if the CORE voltage falls 18% below the
programmed level. Over-current protection folds back the
output voltage to 95mV, reducing the regulator dissipation.
These features provide monitoring and protection for the
microprocessor and power system.
Ordering Information
PART NUMBER TEMP. (oC) PACKAGE PKG. NO.
ISL6562CB
0 to 70 16 Ld SOIC M16.15
ISL6562CB-T
16 Ld SOIC Tape and Reel
ISL6560/62EVAL1 Evaluation Platform
Features
• Two-Phase Power Conversion
• Precision Channel Current Sharing
• Precision CORE Voltage Regulation
- ±0.8% Accuracy
• Microprocessor Voltage Identification Input
- 5-Bit VID Input
- 1.050V to 1.825V in 25mV Steps
- Programmable “Droop” Voltage
• Fast Transient Recovery Time
• Over Current Protection
• High Ripple Frequency, (Channel Frequency
Times Number of Channels). . . . . . . . . . . . .100kHz to 2MHz
Applications
• VRM8.5 Modules
• Intel® Tualatin Processor Voltage Regulator
• Low Output Voltage, High Current DC/DC Converters
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Pinout
ISL6562 (SOIC)
TOP VIEW
VID3 1
VID2 2
VID1 3
VID0 4
VID25mV 5
COMP 6
FB 7
CT 8
16 VCC
15 REF
14 CS-
13 PWM1
12 PWM2
11 CS+
10 PWRGD
9 GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.
Intel® is a registered trademark of Intel Corporation. | Copyright © Intersil Americas Inc. 2001, All Rights Reserved
1 page  
ISL6562
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B 0.013 0.020 0.33 0.51 9
C
0.0075 0.0098 0.19
0.25
-
D 0.3859 0.3937 9.80 10.00 3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC
1.27 BSC
-
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L 0.016 0.050 0.40 1.27 6
N 16
16 7
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.
Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. How-
ever, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
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