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PDF M27W400-100XB6TR Data sheet ( Hoja de datos )

Número de pieza M27W400-100XB6TR
Descripción 4 Mbit 512Kb x8 or 256Kb x16 Low Voltage UV EPROM and OTP EPROM
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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M27W400
4 Mbit (512Kb x8 or 256Kb x16)
Low Voltage UV EPROM and OTP EPROM
s 2.7 to 3.6V LOW VOLTAGE in READ
OPERATION
s READ ACCESS TIME:
– 80ns at VCC = 3.0 to 3.6V
– 100ns at VCC = 2.7 to 3.6V
s BYTE-WIDE or WORD-WIDE
CONFIGURABLE
s 4 Mbit MASK ROM REPLACEMENT
s LOW POWER CONSUMPTION
– Active Current 20mA at 8MHz
– Stand-by Current 15µA
s PROGRAMMING VOLTAGE: 12.5V ± 0.25V
s PROGRAMMING TIME: 50µs/word
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: B8h
DESCRIPTION
The M27W400 is a low voltage 4 Mbit EPROM of-
fered in the two range UV (Ultra Violet Erase) and
OTP (one time programmable). It is ideally suited
for microprocessor systems requiring large data or
program storage. It is organised as either 512
Kwords of 8 bit or 256 Kwords of 16 bit. The pin-
out is compatible with the most common 4 Mbit
Mask ROM.
The M27W400 operates in the read mode with a
supply voltage as low as 2.7V at –40 to 85°C tem-
perature range. The decrease in operating power
allows either a reduction of the size of the battery
or an increase in the time between battery re-
charges.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27W400 is offered in PDIP40 and PLCC44 pack-
ages.
40
1
FDIP40W (F)
40
1
PDIP40 (B)
PLCC44 (K)
Figure 1. Logic Diagram
VCC
18
A0-A17
E
G
BYTEVPP
M27W400
Q15A–1
15
Q0-Q14
VSS
AI03096
January 2000
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M27W400-100XB6TR pdf
M27W400
Table 7. Read Mode DC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 2.7 to 3.6V; VPP = VCC)
Symbol
Parameter
Test Condition
Min
ILI Input Leakage Current
ILO Output Leakage Current
ICC Supply Current
0V VIN VCC
0V VOUT VCC
E = VIL, G = VIL,
IOUT = 0mA, f = 8MHz
E = VIL, G = VIL,
IOUT = 0mA, f = 5MHz
ICC1 Supply Current (Standby) TTL
ICC2 Supply Current (Standby) CMOS
IPP Program Current
E = VIH
E > VCC – 0.2V
VPP = VCC
VIL
VIH (2)
Input Low Voltage
Input High Voltage
–0.6
0.7 VCC
VOL Output Low Voltage
IOL = 2.1mA
VOH Output High Voltage TTL
IOH = –400µA
2.4
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.
Max
±1
±10
20
15
1
15
10
0.2 VCC
VCC + 0.5
0.4
Unit
µA
µA
mA
mA
mA
µA
µA
V
V
V
V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2-line con-
trol function which accommodates the use of mul-
tiple memory connection. The two-line control
function allows:
a. the lowest possible memory power dissipation
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current ICC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca-
pacitive and inductive loading of the device out-
puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor is used on every device between VCC
and VSS. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used be-
tween VCC and VSS for every eight devices. This
capacitor should be mounted near the power sup-
ply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the in-
ductive effects of PCB traces.
5/15

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M27W400-100XB6TR arduino
Table 11. Ordering Information Scheme
Example:
Device Type
M27
Supply Voltage
W = 2.7 to 3.6V
Device Function
400 = 4 Mbit (512Kb x8 or 256Kb x16)
Speed
-100(1,2) = 100 ns
-120 = 120ns
VCC Tolerance
blank = ± 10%
X = ± 5%
Package
F = FDIP40W (3)
B = PDIP40
K = PLCC44
Temperature Range
6 = –40 to 85 °C
Options
TR = Tape & Reel Packing
M27W400
M27W400
-100 X F 6 TR
Note: 1. High Speed, see AC Characteristics section for further information.
2. This speed also guarantees 80ns access time at VCC = 3.0 to 3.6V.
3. For Ceramic Package please contact our Sales Office.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.
Table 1. Revision History
Date
Revision Details
November 1999 First Issue
01/19/00
From TARGET SPECIFICATION to DATA SHEET
120ns speed class added
Temperature Range 1 removed
Note 3 added (Table 11)
11/15

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