PDF DS3897N Datasheet ( Hoja de datos )

Número de pieza DS3897N
Descripción BTL Trapezoidal Transceivers
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo

Total 9 Páginas
DS3897N Hoja de datos, Descripción, Manual
January 1996
BTL TrapezoidalTransceivers
General Description
These advanced transceivers are specifically designed to
overcome problems associated with driving a densely popu-
lated backplane, and thus provide significant improvement in
both speed and data integrity. Their low output capacitance,
low output signal swing and noise immunity features make
them ideal for driving low impedance buses with minimum
power consumption.
The DS3896 is an octal high speed schottky bus transceiver
with common control signals, whereas the DS3897 is a quad
device with independent driver input and receiver output
pins. The DS3897 has a separate driver disable for each
driver and is, therefore, suitable for arbitration lines. The
separate driver disable pins (En) feature internal pull ups
and may be left open if not required. On the other hand, the
DS3896 provides high package density for data/address
The open collector drivers generate precise trapezoidal
waveforms, which are relatively independent of capacitive
loading conditions on the outputs. This significantly reduces
noise coupling to adjacent lines. In addition, the receivers
use a low pass filter in conjunction with a high speed com-
parator, to further enhance the noise immunity and provide
equal rejection to both negative and positive going noise
pulses on the bus.
To minimize bus loading, these devices also feature a schot-
tky diode in series with the open collector output that isolates
the driver output capacitance in the disabled state. The out-
put low voltage is typically “1V” and the output high level is
intended to be 2V. This is achieved by terminating the bus
with a pull up resistor to 2V at both ends. The device can
drive an equivalent DC load of 18.5(or greater) in the
above configuration.
These signalling requirements, including a 1 volt signal
swing, low output capacitance and precise receiver thresh-
olds are referred to as Bus Transceiver Logic (BTL).
n 8 bit DS3896 transceiver provides high package density
n 4 bit DS3897 transceiver provides separate driver input
and receiver output pins
n BTL compatible
n Less than 5 pF output capacitance for minimal bus
n 1 Volt bus signal swing reduces power consumption
n Trapezoidal driver waveforms (tr, tf 6 ns typical)
reduce noise coupling to adjacent lines
n Temperature insensitive receiver thresholds track the
bus logic high level to maximize noise immunity in both
high and low states
n Guaranteed A.C. specifications on noise immunity and
propagation delay over the specified temperature and
supply voltage range
n Open collector driver output allows wire-or connection
n Advanced low power schottky technology
n Glitch free power up/down protection on driver and
receiver outputs
n TTL compatible driver and control inputs and receiver
Logic Diagrams
DS3896N, M
DS3897N, M
Order Numbers DS3896M, DS3896N, DS3897M or DS3897N
See NS Package Number M20B or N20A
Trapezoidalis a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS008510

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DS3897N pdf
DS3897 Switching Characteristics (Continued)
Note: tR = tF 10 ns from 10% to 90%
FIGURE 3. Receiver Propagation Delays
Note: tr = tf 5 ns from 10% to 90%
FIGURE 4. Propagation Delay from CD pin to An

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