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PDF DS34LV86TM Data sheet ( Hoja de datos )

Número de pieza DS34LV86TM
Descripción 3V Enhanced CMOS Quad Differential Line Receiver
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! DS34LV86TM Hoja de datos, Descripción, Manual

February 1997
DS34LV86T
3V Enhanced CMOS Quad Differential Line Receiver
General Description
The DS34LV86T is a high speed quad differential CMOS re-
ceiver that meets the requirements of both TIA/EIA-422-B
and ITU-T V.11. The CMOS DS34LV86T features typical low
static ICC of 9 mA which makes it ideal for battery powered
and power conscious applications. The TRI-STATE® en-
ables, EN, allow the device to be disabled when not in use to
minimize power consumption. The dual enable scheme al-
lows for flexibility in turning receivers on and off.
The receiver output (RO) is guaranteed to be High when the
inputs are left open. The receiver can detect signals as low
as ±200 mV over the common mode range of ±10V. The re-
ceiver outputs (RO) are compatible with TTL and LVCMOS
levels.
Features
n Low power CMOS design (30 mW typical)
n Interoperable with existing 5V RS-422 networks
n Industrial temperature range
n Meets TIA/EIA-422-B (RS-422) and ITU-T V.11
recommendation
n 3.3V Operation
n ±7V common mode range VID = 3V
n ±10V common mode range VID = 0.2V
n Receiver OPEN input failsafe feature
n Guaranteed AC parameter:
Maximum Receiver Skew: 4 ns
Transition time: 10 ns
n Pin compatible with DS34C86T
n 32 MHz Toggle Frequency
n 6.5k ESD Tolerance (HBM)
n Available in SOIC packaging
Connection Diagram
Dual-In-Line Package
Truth Table
Enable
EN
L
H
H
H
L = Logic Low
H = Logic High
X = Irrelevant
Z = TRI-STATE
= Open, Not Terminated
Inputs
RI+–RI−
X
VID +0.2V
VID −0.2V
Open
Output
RO
Z
H
L
H
DS012644-1
Top View
Order Number DS34LV86TN, DS34LV86TM
See NS Package Number M16A or N16E
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS012644
www.national.com

1 page




DS34LV86TM pdf
Typical Application Information (Continued)
RT is optional although highly recommended to reduce reflection
DS012644-6
FIGURE 5. Typical Receiver Connections
DS012644-7
DS012644-8
FIGURE 6. Typical Receiver Output Waveforms
FIGURE 7. Typical Receiver Input Circuit
DS012644-9
5 www.national.com

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