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PDF DS21Q50L Data sheet ( Hoja de datos )

Número de pieza DS21Q50L
Descripción Quad E1 Transceiver
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! DS21Q50L Hoja de datos, Descripción, Manual

www.maxim-ic.com
GENERAL DESCRIPTION
The DS21Q50 E1 quad transceiver contains all the
necessary functions for connecting to four E1 lines.
The on-board clock/data recovery circuitry coverts
the AMI/HDB3 E1 waveforms to an NRZ serial
stream. The DS21Q50 automatically adjusts to E1
22AWG (0.6mm) twisted-pair cables from 0km to
over 2km in length. The device can generate the
necessary G.703 waveshapes for both 75W coax and
120W twisted-pair cables. The on-board jitter
attenuators (selectable to either 32 bits or 128 bits)
can be placed in either the transmit or receive data
paths. The framers locate the frame and multiframe
boundaries and monitor the data streams for alarms.
The device contains a set of internal registers, from
which the user can access and control the operation
of the unit by the parallel control port or serial port.
The device fully meets all the latest E1 specifications
including ITU-T G.703, G.704, G.706, G.823, G.732,
and I.431 ETS 300 011, ETS 300 233, and ETS 300
166 as well as CTR12 and CTR4.
APPLICATIONS
DSLAMs
Routers
IMA and WAN Equipment
PIN CONFIGURATION
TOP VIEW
DS21Q50
100
1
LQFP
DS21Q50
Quad E1 Transceiver
FEATURES
§ Four Complete E1 (CEPT) PCM-30/ISDN-PRI
Transceivers
§ Long-Haul and Short-Haul Line Interfaces
§ 32-Bit or 128-Bit Crystal-Less Jitter Attenuator
§ Frames to FAS, CAS, CCS, and CRC4 Formats
§ 4MHz/8MHz/16MHz Clock Synthesizer
§ Flexible System Clock with Automatic Source
Switching on Loss-of-Clock Source
§ Two-Frame Elastic-Store Slip Buffer on the
Receive Side
§ Interleaving PCM Bus Operation Up to
16.384MHz
§ Configurable Parallel and Serial Port Operation
§ Detects and Generates Remote and AIS Alarms
§ Fully Independent Transmit and Receive
Functionality
§ Four Separate Loopback Functions
§ PRBS Generation/Detection/Error Counting
§ 3.3V Low-Power CMOS
§ Large Counters for Bipolar and Code Violations,
CRC4 Codeword Errors, FAS Word Errors, and
E Bits
§ Eight Additional User-Configurable Output Pins
§ 100-Pin, 14mm x 14mmLQFP Package
ORDERING INFORMATION
PART
DS21Q50L
DS21Q50LN
TEMP RANGE
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
100 LQFP (14mm)
100 LQFP (14mm)
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 013004

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DS21Q50L pdf
DS21Q50
LIST OF TABLES
Table 2-1. Pin Assignments (by Function) ....................................................................................................9
Table 2-2. Pin Assignment (by LQFP Pin Number)....................................................................................12
Table 3-1. Bus Mode Select.........................................................................................................................20
Table 3-2. Register Map ..............................................................................................................................23
Table 4-1. Sync/Resync Criteria..................................................................................................................26
Table 5-1. Alarm Criteria ............................................................................................................................34
Table 8-1. Transmit PRBS Mode Select......................................................................................................45
Table 8-2. Receive PRBS Mode Select .......................................................................................................45
Table 9-1. Master Port Selection .................................................................................................................47
Table 9-2. Synthesizer Output Select ..........................................................................................................47
Table 15-1. OUTA and OUTB Function Select ..........................................................................................55
Table 16-1. Receive Monitor Mode Gain....................................................................................................57
Table 16-2. Monitor Mode Settings.............................................................................................................58
Table 16-3. Line Build-Out Select in LICR ................................................................................................59
Table 16-4. Transformer Specifications ......................................................................................................59
Table 18-1. IBO Device Assignment...........................................................................................................66
Table 18-2. IBO System Clock Select.........................................................................................................67
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DS21Q50L arduino
DS21Q50
NAME
PIN PARALLEL PORT SERIAL PORT TYPE
ENABLED
ENABLED
FUNCTION
[Serial Port Mode in Brackets]
56 TSER2
I Transmit Serial Data
31 TSER3
I Transmit Serial Data
6 TSER4
I Transmit Serial Data
82 TSYNC1
I/O Transmit Sync
57 TSYNC2
I/O Transmit Sync
32 TSYNC3
I/O Transmit Sync
7 TSYNC4
I/O Transmit Sync
76 TTIP1
O Transmit Analog Tip Output
51 TTIP2
O Transmit Analog Tip Output
26 TTIP3
O Transmit Analog Tip Output
1 TTIP4
O Transmit Analog Tip Output
78 TVDD1
— Transmit Analog Positive Supply
53 TVDD2
— Transmit Analog Positive Supply
28 TVDD3
— Transmit Analog Positive Supply
3 TVDD4
— Transmit Analog Positive Supply
77 TVSS1
— Transmit Analog Signal Ground
52 TVSS2
— Transmit Analog Signal Ground
27 TVSS3
— Transmit Analog Signal Ground
2 TVSS4
— Transmit Analog Signal Ground
74 WR (R/W)
SDI I Write Input (Read/Write) [Serial Data Input]
Note: EQVSS lines are tied to RVSS lines in the 100-pin LQFP package.
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