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PDF DS2165 Data sheet ( Hoja de datos )

Número de pieza DS2165
Descripción 16/24/32kbps ADPCM Processor
Fabricantes Dallas Semiconducotr 
Logotipo Dallas Semiconducotr Logotipo



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No Preview Available ! DS2165 Hoja de datos, Descripción, Manual

www.maxim-ic.com
FEATURES
§ Compresses/expands 64kbps PCM voice
to/from either 32kbps, 24kbps, or 16kbps
§ Dual fully independent channel architecture;
device can be programmed to perform either:
- two expansions
- two compressions
- one expansion and one compression
§ Interconnects directly to combo-codec
devices
§ Input to output delay is less than 375ms
§ Simple serial port used to configure the
device
§ On-board time-slot assigner-circuit (TSAC)
function allows data to be input/output at
various time slots
§ Supports Channel Associated Signaling
§ Each channel can be independently idled or
placed into bypass
§ Available hardware mode requires no host
processor; ideal for voice storage
applications
§ Single +5V supply; low-power CMOS
technology
§ Available in 28-pin PLCC
§ 3V operation version is available
(DS2165QL)
DS2165Q
16/24/32kbps ADPCM Processor
PIN ASSIGNMENT (Top View)
NC
A0
A1
A2
A3
A4
A5
4 3 2 1 28 27 26
5 25
6 24
7 23
8 DS2165Q 22
9 21
10 20
11 19
12 13 14 15 16 17 18
FSY
YOUT
CS
SDI
SCLK
XOUT
NC
28-Pin PLCC
DESCRIPTION
The DS2165Q ADPCM processor chip is a dedicated digital-signal-processing (DSP) chip that has been
optimized to perform adaptive-differential pulse-code modulation (ADPCM) speech compression at three
different rates. The chip can be programmed to compress (expand) 64kbps voice data down to (up from)
either 32kbps, 24kbps, or 16kbps. The compression to 32kbps follows the algorithm specified by CCITT
Recommendation G.721 (July 1986) and ANSI document T1.301 (April 1987). The compression to
24kbps follows ANSI document T1.303. The compression to 16kbps follows a proprietary algorithm
developed by Dallas Semiconductor. The DS2165Q can switch compression algorithms on-the-fly. This
allows the user to make maximum use of the available bandwidth on a dynamic basis.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about device errata,
click here: http://www.maxim-ic.com/errata.
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DS2165 pdf
Figure 3. ADDRESS/COMMAND BYTE
(MSB)
X/ Y A5 A4
A3
A2
SYMBOL
X/ Y
A5
A4
A3
A2
A1
A0
POSITION
ACB.7
ACB.6
ACB.5
ACB.4
ACB.3
ACB.2
ACB.1
ACB.0
FUNCTION
Reserved. Must be 0 for proper operation
X/Y Channel Select
0 = update channel Y characteristics
1 = update channel X characteristics
MSB of device address
LSB of device address
Figure 4. CONTROL REGISTER
(MSB)
AS0 AS1 IPD ALRST
BYP
U/ A
SYMBOL
AS0
AS1
IPD
ALRST
BYP
U/ A
AS2
CP/ EX
POSITION
CR.7
CR.6
CR.5
CR.4
CR.3
CR.2
CR.1
CR.0
FUNCTION
Algorithm Select 0 (Table 2)
Algorithm Select 1 (Table 2)
Idle and Power-Down
0 = channel enabled
1 = channel disabled (output tri-stated)
Algorithm Reset
0 = normal operation
1 = reset algorithm for selected channel
Bypass
0 = normal operation
1 = bypass selected channel
Data Format
0 = A-law
1 = m-law
Algorithm Select 2 (Table 2)
Channel Coding
0 = expand (decode) selected channel
1 = compress (encode) selected channel
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DS2165Q
(LSB)
A1 A0
(LSB)
AS2 CP/ EX

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DS2165 arduino
DS2165Q
PCM AND ADPCM INPUT/OUTPUT
Since the organization of the input and output time slots on the DS2165Q does not depend on the
algorithm selected, it always assumes that PCM input and output are in 8-bit bytes and that ADPCM
input and output are in 4-bit bytes. Figure 12 demonstrates how the DS2165Q handles the I/O for the
three different algorithms. In the figure, it is assumed that channel X is in the compression mode
(CP/ EX = 1) and channel Y is in the expansion mode (CP/ EX = 0). Also, it is assumed that both the input
and output time slots for both channels are set to 0.
Figure 12. PCM AND ADPCM I/O EXAMPLE
Note 1: The bit after the LSB in the 24kbps ADPCM output is only a 1 when the DS2165Q is operated
in the software mode and is programmed to perform 24kbps compression; in all other configurations, it is
a 0.
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