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PDF 100390QC Data sheet ( Hoja de datos )

Número de pieza 100390QC
Descripción Low Power Single Supply Hex PECL-to-TTL Translator
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! 100390QC Hoja de datos, Descripción, Manual

September 1990
Revised August 2000
100390
Low Power Single Supply Hex PECL-to-TTL Translator
General Description
The 100390 is a hex translator for converting F100K logic
levels to TTL logic levels. Unlike other level translators, the
100390 operates using only one +5V supply. Differential
inputs allow each circuit to be used as an inverting, nonin-
verting, or differential receiver. An internal reference gener-
ator provides VBB for single-ended operation. The standard
FAST3-STATE outputs are enabled by a common active
low TTL compatible OE input. Partitioned VCCs on chip are
brought out on separate power pins, allowing the noisy TTL
VCC power plane to be isolated from the relatively quiet
ECL VCC. The 100390 is ideal for applications limited to a
single +5V supply, allowing for easy ECL to TTL Interfac-
ing.
Features
s Operates from a single +5V supply
s 3-STATE outputs
s 2000V ESD protection
s VBB supplied for single-ended operation
Ordering Code:
Order Number Package Number
Package Description
100390SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
100390PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100390QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100390QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
FASTis a registered trademark of Fairchild Semiconductor.
© 2000 Fairchild Semiconductor Corporation DS010897
www.fairchildsemi.com

1 page




100390QC pdf
Switching Waveforms
FIGURE 1. Data to Output Propagation Delay
Test Circuit
FIGURE 2. Enable/Disable Propagation Delay
Notes:
GND = 0V, ECL VCC = +5V, TTL VCC = +5V
L1 and L2 = equal length 50impedance lines
50terminators are internal to S/H measurement unit
Decoupling 0.1 µF from GND to ECL VCC and TTL VCC
All unused outputs are loaded with 500to GND
CL = Fixture and stray capacitance = 50 pF
Switch S1 is open for tPLH, tPHL, tPHZ and tPZH tests
Switch S1 is closed only for tPLZ and tPZL tests
FIGURE 3. AC Test Circuit
5
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