DataSheet.es    


PDF FAN5098 Data sheet ( Hoja de datos )

Número de pieza FAN5098
Descripción Two Phase Interleaved Synchronous Buck Converter for AMD Hammer
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



Hay una vista previa y un enlace de descarga de FAN5098 (archivo pdf) en la parte inferior de esta página.


Total 17 Páginas

No Preview Available ! FAN5098 Hoja de datos, Descripción, Manual

www.fairchildsemi.com
FAN5098
Two Phase Interleaved Synchronous Buck Converter
for AMD® Hammer™
Features
• Programmable output from 800mV to 1.550V in 25mV
steps using an integrated 5-bit DAC
• Two interleaved synchronous phases for maximum
performance
• 100nsec transient response time
• Built-in current sharing between phases
• Remote sense
• Programmable Active Droop(Voltage Positioning)
• Programmable switching frequency from 100KHz to
1MHz per phase
• Adaptive delay gate switching
• Integrated high-current gate drivers
• Integrated Power Good, OV, UV, Enable/Soft Start
functions
• Drives N-channel MOSFETs
• Operation optimized for 12V operation
• High efficiency mode (E*) at light load
• Overcurrent protection using MOSFET sensing
• 24 pin TSSOP package
Applications
• VRM/VRD for 64-Bit Athlon™ and Opteron™ CPU’s
• VRM/VRD for Advanced CPU’s
• Programmable step-down power supply
Description
The FAN5098 is a synchronous two-phase DC-DC controller
IC which provides a highly accurate, programmable output
voltage for the AMD® Hammer™ processor. Two inter-
leaved synchronous buck regulator phases with built-in cur-
rent sharing operate 180° out of phase to provide the fast
transient response needed to satisfy high current applications
while minimizing external components.
The FAN5098 features Programmable Active Droopfor
transient response with minimum output capacitance. It has
integrated high-current gate drivers, with adaptive delay gate
switching, eliminating the need for external drive devices.
The FAN5098 uses a 5-bit D/A converter to program the out-
put voltage from 800mV to 1.550V in 25mV steps with an
accuracy of 1%. The FAN5098 uses a high level of integra-
tion to deliver load currents in excess of 50A from a 12V
source with minimal external circuitry.
The FAN5098 also offers integrated functions including
Power Good, Output Enable/Soft Start, under-voltage lock-
out, over-voltage protection, and adjustable current limiting
with independent current sense on each phase. It is available
in a 24 pin TSSOP package.
Block Diagram
23
RT
OSC
5-Bit
DAC
1 23 4 5
VID0 VID2 VID4
VID1 VID3
BYPASS
+12V
6 18
5V Reg
UVL O
+ Digital
- Control
-
+
GNDA
Current
Limit
-
+
-
+
+12V
Power
Good
- Digital
+
Control
+12V
24 19
21 7
PWRGD DROOP/E* AGND
22
ENABLE/SS
20
ILIM
BOOT A
13
14
15
17
16
BOOT B
12
11
10
8
9
Athlon™ and Hammer™ are registered trademarks of AMD®. Programmable Active Droop is a trademark of Fairchild Semiconductor.
+12V
+12V
VO
REV. 1.0.7 2/18/03

1 page




FAN5098 pdf
PRODUCT SPECIFICATION
Gate Drive Test Circuit
VOUT
3000pF
tR
10%
90%
2V
tDT
1.2V
tF
90%
2.5V
10%
HDRV
tDT
2V LDRV
Figure 1. Output Drive Timing Diagram
Table 1. Output Voltage Programming Codes
VID4
VID3
VID2
111
111
111
111
110
110
110
110
101
101
101
101
100
100
100
100
011
011
011
011
010
010
010
010
001
001
001
001
000
000
000
000
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Note: Nominal output is typically offset +25mV from VID table.
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
FAN5098
VOUT to CPU
OFF
0.800V
0.825V
0.850V
0.875V
0.900V
0.925V
0.950V
0.975V
1.000V
1.025V
1.050V
1.075V
1.100V
1.125V
1.150V
1.175V
1.200V
1.225V
1.250V
1.275V
1.300V
1.325V
1.350V
1.375V
1.400V
1.425V
1.450V
1.475V
1.500V
1.525V
1.550V
REV. 1.0.7 2/18/03
5

5 Page





FAN5098 arduino
PRODUCT SPECIFICATION
FAN5098
Adaptive Delay Gate Drive
The FAN5098 embodies an advanced design that ensures
minimum MOSFET transition times while eliminating
shoot-through current. It senses the state of the MOSFETs
and adjusts the gate drive adaptively to ensure that they are
never on simultaneously. When the high-side MOSFET turns
off, the voltage on its source begins to fall. When the voltage
there reaches approximately 2.5V, the low-side MOSFETs
gate drive is applied. When the low-side MOSFET turns off,
the voltage at the LDRV pin is sensed. When it drops below
approximately 1.2V, the high-side MOSFET’s gate drive is
applied with 50nsec delay.
Maximum Duty Cycle
In order to ensure that the current-sensing and charge-
pumping work, the FAN5098 guarantees that the low-side
MOSFET will be on a certain portion of each period. For low
frequencies, this occurs as a maximum duty cycle of approxi-
mately 90%. Thus at 250KHz, with a period of 4µsec, the
low-side will be on at least 4µsec • 10% = 400nsec. At higher
frequencies, this time might fall so low as to be ineffective.
The FAN5098 guarantees a minimum low-side on-time of
approximately 330nsec, regardless of duty cycle.
Current Sensing
The FAN5098 has two independent current sensors, one for
each phase. Current sensing is accomplished by measuring
the source-to-drain voltage of the low-side MOSFET during
its on-time. Each phase has its own power ground pin, to per-
mit the phases to be placed in different locations without
affecting measurement accuracy. For best results, it is impor-
tant to connect the PGND and SW pins for each phase as a
Kelvin trace pair directly to the source and drain, respec-
tively, of the appropriate low-side MOSFET. Care is required
in the layout of these grounds; see the layout guidelines in
this datasheet.
Current Sharing
The two independent current sensors of the FAN5098 operate
with their independent current control loops to guarantee that
the two phases each deliver half of the total output current.
The only mismatch between the two phases occurs if there is
a mismatch between the RDS,on of the low-side MOSFETs.
Short Circuit Current Characteristics (ILIM Pin)
The FAN5098 short circuit current characteristic includes a
function that protects the DC-DC converter from damage in
the event of a short circuit. The short circuit limit is set with
the RS resistor, as given by the formula
RS(Ω) = ISC RDS, on RT 3.33
with ISC the desired output current limit, RT the oscillator
resistor and RDS,on one phase’s low-side MOSFET’s on
resistance. Remember to make the RS large enough to
include the effects of initial tolerance and temperature
variation on the MOSFETs’ RDS,on.
Important Note! The oscillator frequency must be selected
before selecting the current limit resistor, because the value
of RT is used in the calculation of RS.
When an overcurrent is detected, the high-side MOSFETs
are turned off, and the low-side MOSFETs are turned on,
and they remain in this state until the measured current
through the low-side MOSFET has returned to zero amps.
After reaching zero, the FAN5098 re-soft-starts, ensuring
that it can also safely turn on into a short.
A limitation on the current sense circuit is that ISC • RDS,on
must be less that 375mV. To ensure correct operation, use
ISC • RDS,on 300mV; between 300mV and 375mV, there
will be some non-linearity in the short-circuit current not
accounted for in the equation.
As an example, consider the typical characteristic of the
DC-DC converter circuit with two FDP6670AL low-side
MOSFETs (RDS = 6.5mmaximum at 25°C • 1.2 at 75°C
= 7.8meach, or 3.9mtotal) in each phase, RT = 42.1K
(600KHz oscillator) and a 50KRS.
The converter exhibits a normal load regulation characteris-
tic until the voltage across the MOSFETs exceeds the inter-
nal short circuit threshold of 50K/(3.9m• 41.2K• 6.66)
= 47A. [Note that this current limit level can be as high as
50K/(3.5m• 41.2K• 6.66) = 52A, if the MOSFETs
have typical RDS,on rather than maximum, and are at 25°C.]
At this point, the internal comparator trips and signals the
controller to leave on the low-side MOSFETs and keep off
the high-side MOSFETs. The inductor current decreases,
and power is not applied again until the inductor current
reaches 0A and the converter attempts to re-softstart.
E*-mode
In addition, further enhancement in efficiency can be
obtained by putting the FAN5098 into E*-mode. When the
Droop pin is pulled to the 5V BYPASS voltage, the “A”
phase of the FAN5098 is completly turned off, reducing in
half the amount of gate charge power being consumed.
E*-mode can be implemented with the circuit shown in
Figure 3.
FAN5098, Pin 6
(Bypass)
10K
2N3906
HI=E*MODE
10K
10K
1K
2N3904
FAN5098, Pin 21
(Droop, E*)
RDROOP
Figure 3. Implementing E*-mode Control
REV. 1.0.7 2/18/03
11

11 Page







PáginasTotal 17 Páginas
PDF Descargar[ Datasheet FAN5098.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
FAN5090Two Phase Interleaved Synchronous Buck Converter for VRM 9.x ApplicationsFairchild Semiconductor
Fairchild Semiconductor
FAN5090MTCTwo Phase Interleaved Synchronous Buck Converter for VRM 9.x ApplicationsFairchild Semiconductor
Fairchild Semiconductor
FAN5090MTCXTwo Phase Interleaved Synchronous Buck Converter for VRM 9.x ApplicationsFairchild Semiconductor
Fairchild Semiconductor
FAN5091Two Slice Interleaved Synchronous Buck ConverterFairchild Semiconductor
Fairchild Semiconductor

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar