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PDF FAN5090MTC Data sheet ( Hoja de datos )
| Número de pieza | FAN5090MTC | |
| Descripción | Two Phase Interleaved Synchronous Buck Converter for VRM 9.x Applications | |
| Fabricantes | Fairchild Semiconductor | |
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www.fairchildsemi.com
FAN5090
Two Phase Interleaved Synchronous Buck Converter
for VRM 9.x Applications
Features
• Programmable output from 1.10V to 1.85V in 25mV steps
using an integrated 5-bit DAC
• Two interleaved synchronous phases for maximum
performance
• 100nsec transient response time
• Built-in current sharing between phases
• Remote sense
• Programmable Active Droop (Voltage Positioning)
• Programmable switching frequency from 100KHz to
300KHz per phase
• Adaptive delay gate switching
• Integrated high-current gate drivers
• Integrated Power Good, OV, UV, Enable/Soft Start
functions
• Drives N-channel MOSFETs
• Operation optimized for 12V operation
• Overcurrent protection using MOSFET sensing
• 24 pin TSSOP package
Applications
• Power supply for Pentium IV
• Power supply for Athlon
• VRM for Pentium IV processor
• Programmable step-down power supply
Description
The FAN5090 is a synchronous two-phase DC-DC controller
IC which provides a highly accurate, programmable output
voltage for VRM 9.x processors. Two interleaved synchro-
nous buck regulator phases with built-in current sharing
operate 180° out of phase to provide the fast transient
response needed to satisfy high current applications while
minimizing external components.
The FAN5090 features Programmable Active Droop for
transient response with minimum output capacitance. It has
integrated high-current gate drivers, with adaptive delay gate
switching, eliminating the need for external drive devices.
The FAN5090 uses a 5-bit D/A converter to program the
output voltage from 1.10V to 1.85V in 25mV steps with an
accuracy of 1%. The FAN5090 uses a high level of integra-
tion to deliver load currents in excess of 50A from a 12V
source with minimal external circuitry.
The FAN5090 also offers integrated functions including
Power Good, Output Enable/Soft Start, under-voltage lock-
out, over-voltage protection, and adjustable current limiting
with independent current sense on each phase. It is available
in a 24 pin TSSOP package.
Block Diagram
23
RT
OSC
5-Bit
DAC
1 23 4 5
VID0 VID2 VID4
VID1 VID3
BYPASS
+12V
6 18
5V Reg
UVL O
+ Digital
- Control
-
+
GNDA
Current
Limit
-
+
-
+
+12V
Power
Good
- Digital
+
Control
+12V
24 19
21 7
PWRGD DROOP/E* AGND
22
ENABLE/SS
20
ILIM
BOOT A
13
14
15
17
16
BOOT B
12
11
10
8
9
+12V
+12V
VO
Pentium is a registered trademark of Intel Corporation. Athlon is a registered trademark of AMD. Programmable Active Droop is a trademark of Fairchild Semiconductor.
REV. 1.0.1 9/16/03
1 page  
PRODUCT SPECIFICATION
FAN5090
Electrical Specifications (continued)
(VCC = 12V, VID = [01111] = 1.475V, and TA = +25°C using circuit in Figure 2, unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
OVP and OTP
Output Overvoltage Detect
Over Temperature Shutdown
Over Temperature Hysteresis
Conditions
Min. Typ. Max. Units
• 2.1 2.2 2.3
130 140 150
40
V
°C
°C
Notes:
1. As measured at the VFB (pin 24) sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal
performance.
2. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with VRM 9.x
specification.
Table 1. Output Voltage Programming Codes
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
Note:
1. 0 = VID pin is tied to GND.
1 = VID pin is pulled up internally to 5V.
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
VOUT to CPU
OFF
1.100V
1.125V
1.150V
1.175V
1.200V
1.225V
1.250V
1.275V
1.300V
1.325V
1.350V
1.375V
1.400V
1.425V
1.450V
1.475V
1.500V
1.525V
1.550V
1.575V
1.600V
1.625V
1.650V
1.675V
1.700V
1.725V
1.750V
1.775V
1.800V
1.825V
1.850V
REV. 1.0.1 9/16/03
5
5 Page 
PRODUCT SPECIFICATION
FAN5090
Application Information
Operation
The FAN5090 Controller
The FAN5090 is a programmable synchronous two-phase
DC-DC controller IC. When designed with the appropriate
external components, the FAN5090 can be configured to
deliver more than 50A of output current, for VRM 9.x
applications. The FAN5090 functions as a fixed frequency
PWM step down regulator.
Main Control Loop
Refer to the FAN5090 Block Diagram on page 1. The
FAN5090 consists of two interleaved synchronous buck con-
verters, implemented with summing-mode control. Each
phase has its own current feedback, and there is a common
voltage feedback.
The two buck converters controlled by the FAN5090 are
interleaved, that is, they run 180° out-of-phase. This mini-
mizes the RMS input ripple current, minimizing the number
of input capacitors required. It also doubles the effective
switching frequency, improving transient response.
Response Time
The FAN5090 utilizes leading-edge, not trailing-edge
control. Conventional trailing-edge control turns on the
high-side MOSFET at a clock signal, and then turns it off
when the error amplifier output voltage is equal to the ramp
voltage. As a result, the response time of a trailing-edge
converter can be as long as the off-time of the high-side
driver, nearly an entire switching period. The FAN5090’s
leading-edge control turns the high-side MOSFET on when
the error amplifier output voltage is equal to the ramp volt-
age, and turns it off at the clock signal. As a result, when a
transient occurs, the FAN5090 responds immediately by
turning on the high-side MOSFET. Response time is set by
the internal propagation delays, typically 100nsec. In worst
case, the response time is set by the minimum on-time of the
low-side MOSFET, 330nsec.
Oscillator
The FAN5090 oscillator section runs at a frequency deter-
mined by a resistor from the RT pin to ground according to
the formula
RT(Ω) = 2----7---f.--(5--H---•--z--1-)--0----9-
The FAN5090 implements “summing mode control”, which
is different from both classical voltage-mode and current-
mode control. It provides superior performance to either by
allowing a large converter bandwidth over a wide range of
output loads and external components. No external compen-
sation is required.
The regulator’s control loop contains two main sections:
the analog control block and the digital control block. The
analog section consists of signal conditioning amplifiers
feeding into a comparator which provides the input to the
digital control block. The signal conditioning section accepts
inputs from a current sensor and a voltage sensor, with the
voltage sensor being common to both phases, and the current
sensor separate for each. The voltage sensor amplifies the
difference between the VFB signal and the reference voltage
from the DAC and presents the output to each of the two
comparators. The current control path for each phase takes
the difference between its PGND and SW pins when the
low-side MOSFET is on, reproducing the voltage across the
MOSFET and thus the input current; It presents the resulting
signal to the same input of its summing amplifier, adding its
signal to the voltage amplifier’s with a certain gain. These
two signals are thus summed together. This sum is then pre-
sented to a comparator looking at the oscillator ramp, which
provides the main PWM control signal to the digital control
block. The oscillator ramps are 180° out-of-phase with each
other, so that the two phases are on alternately.
The digital control block takes the analog comparator input
to provide the appropriate pulses to the HDRV and LDRV
output pins for each phase. These outputs control the exter-
nal power MOSFETs.
The oscillator generates two internal sawtooth ramps, each at
one-half the oscillator frequency, and running 180° out of
phase with each other. These ramps cause the turn-on time of
the two phases to be phased apart. The oscillator frequency
of the FAN5090 can be programmed from 200kHz to
600kHz with each phase running at 100kHz to 300kHz,
respectively. Frequency selection depends on various system
performance criteria, with higher frequency resulting in
smaller components but lower efficiency.
Quiescent current (Icc) of the FAN5090 is also frequency
dependent:
Icc = 12.7 + 0.006 [(f/2) – 100] mA
Where f is the oscillator frequency in KHz
Remote Voltage Sense
The FAN5090 has true remote voltage sense capability, elim-
inating errors due to trace resistance. To utilize remote sense,
the VFB and AGND pins should be connected as a Kelvin
trace pair to the point of regulation, such as the processor
pins. The converter will maintain the voltage in regulation at
that point. Care is required in layout of these grounds; see
the layout guidelines in this datasheet.
High Current Output Drivers
The FAN5090 contains four high current output drivers that
utilize MOSFETs in a push-pull configuration. The drivers
for the high-side MOSFETs use the BOOT pin for input
power and the SW pin for return. The drivers for the low-side
MOSFETs use the VCC pin for input power and the PGND
REV. 1.0.1 9/16/03
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet FAN5090MTC.PDF ] | |
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