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PDF FAN5070 Data sheet ( Hoja de datos )

Número de pieza FAN5070
Descripción High Performance Programmable Synchronous DC-DC Controller
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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www.fairchildsemi.com
FAN5070
High Performance Programmable Synchronous
DC-DC Controller
Features
• Output programmable in 25mV steps from 1.05V to
1.825V using a dynamically programmable integrated
5-bit DAC
• Remote sense
• Programmable Active Droopup to 200mV
• Drives N-Channel MOSFETs
• Overcurrent protection using MOSFET sensing
• Overvoltage protection including startup
• 85% efficiency typical at full load
• Integrated Power Good and Enable/Soft Start functions
• Meets Intel VRM8.5 specifications using minimum
number of external components
• 20 pin SOIC package
Applications
• Power supply for Pentium® III Platforms
• VRM for Pentium III processor
• Programmable power supply
Block Diagram
+5V
VCCA 17
Description
The FAN5070 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable output volt-
age for platforms such as the Intel Pentium III, and provides a
complete solution for all Intel VRM8.5 CPU applications,
and for other high-performance processors. The FAN5070
features remote voltage sensing, independently adjustable
current limit, and a proprietary wide-range Programmable
Active Droopfor optimal converter transient response and
VRM8.5 compliance. The FAN5070 uses a 5-bit D/A con-
verter to dynamically program the output voltage during oper-
ation from 1.05V to 1.825V in 25mV steps. The FAN5070
uses a high level of integration to deliver load currents in
excess of 28A from a 5V source with minimal external
circuitry. Synchronous-mode operation offers optimum
efficiency over the entire specified output voltage range. An
on-board precision low TC reference achieves 0.8% voltage
regulation without expensive external components. The
FAN5070 also offers integrated functions including open-
collector Power Good, Output Enable/Soft Start and current
limiting, and is available in a 20 pin SOIC package.
- 15
+ RD
OSC
OCL
-
+
+12V
+5V
- 14
+ RS
16
20 VCCP
1 HIDRV
5-Bit
DAC
-
+
1.24V
Reference
-
+
Digital
Control
Power
Good
2
19 LODRV
18
GNDP
13 PWRGD
8 765 4
VID0VID2 VID4
VID1 VID3
3
GNDA
12
ENABLE/SS
Pentium is a registered trademark of Intel Corporation. Programmable Active Droop is a trademark of Fairchild Semiconductor.
VCC
REV. 1.0.1 8/7/01

1 page




FAN5070 pdf
FAN5070
Typical Operating Characteristics
(VCCA = 5V, VCCP = 12V, and TA = +25°C using circuit in Figure 1, unless otherwise noted.)
Vcpu Efficiency vs.Output Current
90
85
80
75
70
65
2 4 6 8 10 12 14 16 18 20 22 24 26 28
Output Current (A)
1.48
Droop,Circuit of Fig.1
1.46
1.44
1.42
1.4
1.38
1.36
1.34
0 3 6 9 12 15 18 21 24 28
Output Current (A)
Output Ripple, 1.425 @ 28A
Transient Response, 28A to 0.1A
1.515V
1.425V
1.335V
Time (2 s/division)
Transient Response, 0.1A to 28A
1.515V
1.425V
1.335V
Time (20 s/division)
Switching Waveforms, 28A Load
HIDRV
pin
LODRV
pin
Time (20 s/division)
Time (20 s/division)
5 REV. 1.0.1 8/7/01

5 Page





FAN5070 arduino
PCB Layout Guidelines
• Placement of the MOSFETs relative to the FAN5070 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5070 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise
radiates throughout the board, and, because it is switching
at such a high voltage and frequency, it is very difficult to
suppress.
• In general, all of the noisy switching lines should be kept
away from the quiet analog section of the FAN5070. That
is, traces that connect to pins 1, 2, 16, and 17 (HIDRV,
SW, LODRV and VCCP) should be kept far away from the
traces that connect to pins 3, 13 and 14.
• Place the 0.1µF decoupling capacitors as close to the
FAN5070 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
• Each VCC and GND pin should have its own via to the
appropriate plane. This helps provide isolation between
pins.
• Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the first
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
• Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converter’s performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
• A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
Additional Information
For additional information contact your local Fairchild
Semiconductor representative, or visit us at our web site
www.fairchildsemi.com.
REV. 1.0.1 8/7/01
FAN5070
11

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