PDF FDC37N972 Data sheet ( Hoja de datos )

Número de pieza	FDC37N972
Descripción	Advanced Notebook I/O Controller with Enhanced Keyboard Control and System Management
Fabricantes	SMSC Corporation
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No Preview Available ! FDC37N972 ADVANCE INFORMATION Advanced Notebook I/O Controller with Enhanced Keyboard Control and System Management FEATURES !" 3.3V Operation With 5V Tolerant Buffers !" ACPI 1.0 and PC99 Compliant !" Three Power Planes !" ACPI Embedded Controller Interface !" Low Standby Current in Sleep Mode !" Configuration Register Set Compatible With ISA Plug-and-Play Standard (Version 1.0a) !" Serial IRQ Interface Compatible With Serialized IRQ Support for PCI Systems !" Floppy Disk Interface on Parallel Port !" 8051 Controller uses Parallel Port to Reprogram the Flash ROM !" Advanced Infrared Communications Controller (IrCC 2.0) - IrDA V1.1 (4Mbps), HPSIR, ASKIR, Consumer IR Support - Two IR Ports - Relocatable Base I/O Address !" 512k Byte Flash ROM Interface - 8051/Host CPU Multiplexed Interface - Sixteen 32K Pages - 8051 Keyboard BIOS - Eight 64K Pages - Host System BIOS - Embedded Controller uses Parallel Port to Reprogram Flash ROM !" ISA Host Interface With Clock Run Support and ACPI SCI Interface - 16 Bit Address Qualification - 8 Bit Data Bus - Zero Wait-State I/O Register Access - Shadowed Write Only registers - IOCHRDY for ECP, IRCC 2.0 and Flash Cycles - 15 Direct IRQs Including nSMI - Four 8 Bit DMA Channels - XNOR Test Chain !"High-Performance Embedded 8051 Keyboard and System Controller - Provides System Power Management - System Watch Dog Timer (WDT) - 8042 Style Host Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 2K Internal ROM, nEA Pin Select - 32K Bank Switchable External Flash ROM Interface - 256 Bytes Data RAM - On-Chip Control Registers Available via MOVX External Data Access Commands - Access to RTC and CMOS Registers - Up to 16x8 Keyboard Scan Matrix - Three 16 Bit Timer/Counters - Integrated TX/RX Serial Interface - Eleven 8051 Interrupt Sources - Thirty-Two 8 Bit, Host/8051 Mailbox Registers - Thirty Maskable Hardware Wake-Up Events Supported - Fast GATEA20 - Fast CPU_RESET - Multiple Clock Sources and Frequencies - IDLE and SLEEP Modes - Fail-Safe Ring Oscillator !"Real Time Clock - MC146818 and DS1287 Compatible - 256 Bytes of Battery Backed CMOS in Two 128-Byte Banks - 128 Bytes of CMOS RAM Lockable in 4x32 Byte Blocks - 12 and 24 Hour Time Format - Binary and BCD Format 1 page FDD INTERFACE PINS...............................................................................................................134 UART POWER MANAGEMENT ..................................................................................................135 PARALLEL PORT POWER MANAGEMENT................................................................................135 8051 EMBEDDED CONTROLLER .................................................................................................136 8051 FUNCTIONAL OVERVIEW.................................................................................................136 POWERING UP OR RESETTING THE 8051...............................................................................137 CPU RESET SEQUENCE ...........................................................................................................140 8051 CLOCK CONTROLS ..........................................................................................................142 8051 RING OSCILLATOR FAIL-SAFE CONTROLS ....................................................................144 8051 MEMORY MAP...................................................................................................................145 FLASH ROM INTERFACE...........................................................................................................152 8051 CONTROL REGISTERS.....................................................................................................153 8051 CONFIGURATION/CONTROL MEMORY MAPPED REGISTERS .........................................162 8051 INTERRUPTS.....................................................................................................................165 WATCH DOG TIMER .....................................................................................................................183 WDT OPERATION......................................................................................................................183 WDT ACTION .............................................................................................................................183 WDT ACTIVATION .....................................................................................................................183 WDT RESET MECHANISM.........................................................................................................183 WDT MEMORY MAPPED REGISTERS ......................................................................................184 SHARED FLASH INTERFACE .......................................................................................................185 FLASH INTERFACE DIAGRAM...................................................................................................185 SYSTEM MEMORY MAP ............................................................................................................186 KEYBOARD BIOS (KMEM) .........................................................................................................187 SYSTEM BIOS (HMEM) ..............................................................................................................189 HOST FLASH ACCESS ..............................................................................................................189 IDLE MODE ................................................................................................................................195 SLEEP MODE.............................................................................................................................197 WAKE-UP EVENTS ....................................................................................................................201 8042 STYLE HOST INTERFACE.................................................................................................204 KEYBOARD DATA WRITE..........................................................................................................204 8051- TO- HOST KEYBOARD COMMUNICATION ......................................................................205 HOST-TO 8051 KEYBOARD COMMUNICATION ........................................................................206 GATEA20 HARDWARE SPEED-UP ............................................................................................208 SMSC PS/2 LOGIC OVERVIEW .................................................................................................217 SMSC PS/2 MEMORY MAPPED CONTROL REGISTERS ..........................................................218 DEVIL LOGIC OVERVIEW..........................................................................................................225 THE DEVIL PS/2 LOGIC COMMANDS........................................................................................225 DEVIL PS/2 MEMORY MAPPED CONTROL REGISTERS ..........................................................227 5 5 Page TQFP PIN# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 FGBA PIN# A1 C2 D4 B1 C1 D2 D3 E4 D1 E2 E3 F4 E1 F2 F3 G4 F1 G2 G3 H4 G1 H2 H3 J4 H1 J2 J3 K4 J1 K2 K3 L4 K1 L2 L3 M4 L1 M2 DESCRIPTION OF PIN FUNCTIONS TABLE 1 - FDC37N972 PIN CONFIGURATION TQFP FGBA TQFP NAME PIN# PIN# NAME PIN# VSS 39 M3 KSI5 77 OUT5 40 N4 KSI4 78 OUT6 41 M1 KSI3 79 DRVDEN0 42 N2 KSI2 80 DRVDEN1 43 N3 KSI1 81 nMTR0 44 N1 KSI0 82 VSS 45 P1 GPIO20 83 nDS0 46 P2 GPIO21 84 nDIR 47 P3 IMCLK 85 nSTEP 48 R1 IMDAT 86 nWDATA 49 T1 VSS 87 nWGATE 50 R2 KCLK 88 nHDSEL 51 R3 KDAT 89 nINDEX 52 T2 EMCLK 90 nTRK0 53 U1 EMDAT 91 nWRTPRT 54 T3 SA0 92 nRDATA 55 P4 SA1 93 nDSKCHG 56 U2 SA2 94 FPD 57 U3 SA3 95 IRTX 58 T4 SA4 96 IRRX 59 R4 SA5 97 KSO13 60 P5 SA6 98 KSO12 61 U4 SA7 99 KSO11 62 T5 SA8 100 KSO10 63 R5 SA9 101 KSO9 64 P6 SA10 102 KSO8 65 U5 SA11 103 KSO7 66 T6 SA12 104 VCC1 67 R6 SA13 105 KSO6 68 P7 SA14 106 KSO5 69 U6 SA15 107 KSO4 70 T7 OUT0 108 KSO3 71 R7 OUT1 109 KSO2 KSO1 KSO0 KSI7 KSI6 72 P8 OUT2 110 73 U7 VSS 111 74 T8 OUT3 112 75 R8 OUT4 113 76 P9 nNOWS 114 11 FGBA PIN# U8 T9 R9 P10 U9 T10 R10 P11 U10 T11 R11 P12 U11 T12 R12 P13 U12 T13 R13 U13 U14 T14 R14 U15 U16 T15 R15 T16 U17 R16 P14 T17 R17 P16 P15 N14 P17 N16 NAME nIOR nIOW AEN SD0 SD1 SD2 VCC2 SD3 SD4 SD5 SD6 SD7 VSS nDACK0 DRQ0 nDACK1 DRQ1 TC IOCHRDY nROMCS nMEMRD nMEMWR PCI_CLK nCLKRUN SER_IRQ nRESET_OUT CLOCKI VCC2 24MHz_OUT nEC_SCI VSS 32kHz_OUT VCC1_ PWRGD nPWR_LED PWRGD SLCT PE BUSY 11 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
FDC37N972	Advanced Notebook I/O Controller with Enhanced Keyboard Control and System Management	SMSC Corporation

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