DataSheet.es    


PDF FC80960HT75SL2GT Data sheet ( Hoja de datos )

Número de pieza FC80960HT75SL2GT
Descripción 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor
Fabricantes Intel Corporation 
Logotipo Intel Corporation Logotipo



Hay una vista previa y un enlace de descarga de FC80960HT75SL2GT (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! FC80960HT75SL2GT Hoja de datos, Descripción, Manual

80960HA/HD/HT 32-Bit High-Performance
Superscalar Processor
Data Sheet
Advance Information
Product Features
s 32-Bit Parallel Architecture
—Load/Store Architecture
—Sixteen 32-Bit Global Registers
—Sixteen 32-Bit Local Registers
—1.28 Gbyte Internal Bandwidth
(80 MHz)
—On-Chip Register Cache
s Processor Core Clock
—80960HA is 1x Bus Clock
—80960HD is 2x Bus Clock
—80960HT is 3x Bus Clock
s Binary Compatible with Other 80960
Processors
s Issue Up To 150 Million Instructions per
Second
s High-Performance On-Chip Storage
—16 Kbyte Four-Way Set-Associative
Instruction Cache
—8 Kbyte Four-Way Set-Associative Data
Cache
—2 Kbyte General Purpose RAM
—Separate 128-Bit Internal Paths For
Instructions/Data
s 3.3 V Supply Voltage
—5 V Tolerant Inputs
—TTL Compatible Outputs
s Guarded Memory Unit
—Provides Memory Protection
—User/Supervisor Read/Write/Execute
s 32-Bit Demultiplexed Burst Bus
—Per-Byte Parity Generation/Checking
—Address Pipelining Option
—Fully Programmable Wait State
Generator
—Supports 8-, 16- or 32-Bit Bus Widths
—160 Mbyte/s External Bandwidth
(40 MHz)
s High-Speed Interrupt Controller
—Up to 240 External Interrupts
—31 Fully Programmable Priorities
—Separate, Non-maskable Interrupt Pin
s Dual On-Chip 32-Bit Timers
—Auto Reload Capability and One-Shot
—CLKIN Prescaling, ÷1, 2, 4 or 8
—JTAG Support - IEEE 1149.1 Compliant
Notice: This document contains information on products in the sampling and initial production
phases of development. The specifications are subject to change without notice. Verify with your
local Intel sales office that you have the latest datasheet before finalizing a design.
Order Number: 272495-007
July, 1998

1 page




FC80960HT75SL2GT pdf
80960HA/HD/HT
Tables
50
51
52
53
54
56
57
58
59
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
BOFF Functional Timing. BOFF occurs during a burst or
non-burst data cycle. .......................................................................................... 67
HOLD Functional Timing .................................................................................... 68
LOCK Delays HOLDA Timing ............................................................................ 69
FAIL Functional Timing....................................................................................... 69
A Summary of Aligned and Unaligned Transfers for 32-Bit Regions ................. 70
A Summary of Aligned and Unaligned Transfers for 16-Bit Bus ........................ 72
A Summary of Aligned and Unaligned Transfers for 8-Bit Bus .......................... 73
Idle Bus Operation.............................................................................................. 74
Bus States .......................................................................................................... 75
80960Hx Product Description................................................................................ 1
Fail Codes For BIST (bit 7 = 1) ............................................................................. 4
Remaining Fail Codes (bit 7 = 0)........................................................................... 4
80960Hx Instruction Set ........................................................................................ 5
80960HA/HD/HT Package Types and Speeds ..................................................... 6
Pin Description Nomenclature............................................................................... 7
80960Hx Processor Family Pin Descriptions ........................................................ 8
80960Hx 168-Pin PGA Pinout — Signal Name Order ........................................14
80960Hx 168-Pin PGA Pinout — Pin Number Order ..........................................16
80960Hx PQ4 Pinout — Signal Name Order ......................................................19
80960Hx PQ4 Pinout — Pin Number Order........................................................21
Maximum TA at Various Airflows in °C (PGA Package Only)..............................24
80960Hx 168-Pin PGA Package Thermal Characteristics ..................................24
Maximum TA at Various Airflows in °C (PQ4 Package Only) ..............................25
80960Hx 208-Pin PQ4 Package Thermal Characteristics ..................................25
Fields of 80960Hx Device ID...............................................................................27
80960Hx Device ID Model Types........................................................................27
Device ID Version Numbers for Different Steppings ...........................................27
Operating Conditions...........................................................................................29
VDIFF Specification for Dual Power Supply Requirements (3.3 V, 5 V)...............30
80960Hx DC Characteristics ...............................................................................32
80960Hx AC Characteristics ...............................................................................34
AC Characteristics Notes ....................................................................................36
80960Hx Boundary Scan Test Signal Timings....................................................36
80960Hx Boundary Scan Chain ..........................................................................76
Data Sheet Version -006 to -007 Revision History..............................................96
Advance Information Datasheet
v

5 Page





FC80960HT75SL2GT arduino
80960HA/HD/HT
2.3 Instruction Set Summary
Table 4 summarizes the 80960Hx instruction set by logical groupings.
Table 4. 80960Hx Instruction Set
Data Movement
Arithmetic
Logical
Load
Store
Move
Load Address
Conditional Select(2)
Add
Subtract
Multiply
Divide
Remainder
Modulo
Shift
Extended Shift
Extended Multiply
Extended Divide
Add with Carry
Subtract with Carry
Rotate
Conditional Add(2)
Conditional Subtract(2)
And
Not And
And Not
Or
Exclusive Or
Not Or
Or Not
Nor
Exclusive Nor
Not
Nand
Comparison
Branch
Call/Return
Compare
Conditional Compare
Compare and Increment
Compare and Decrement
Compare Byte(2)
Compare Short(2)
Test Condition Code
Check Bit
Unconditional Branch
Conditional Branch
Compare and Branch
Call
Call Extended
Call System
Return
Branch and Link
Debug
Processor Mgmt
Atomic
Modify Trace Controls
Mark
Force Mark
Flush Local Registers
Modify Arithmetic
Controls
Modify Process Controls
Interrupt Enable/
Disable(1,2)
System Control(1)
Atomic Add
Atomic Modify
NOTES:
1. 80960Hx extensions to the 80960 core instruction set.
2. 80960Hx extensions to the 80960Cx instruction set.
Bit / Bit Field / Byte
Set Bit
Clear Bit
Not Bit
Alter Bit
Scan For Bit
Span Over Bit
Extract
Modify
Scan Byte for Equal
Byte Swap(2)
Fault
Conditional Fault
Synchronize Faults
Cache Control
Instruction Cache
Control(1,2)
Data Cache Control(1,2)
Advance Information Datasheet
5

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet FC80960HT75SL2GT.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
FC80960HT75SL2GT80960HA/HD/HT 32-Bit High-Performance Superscalar ProcessorIntel Corporation
Intel Corporation

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar