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PDF 100351 Data sheet ( Hoja de datos )
| Número de pieza | 100351 | |
| Descripción | Low Power Hex D Flip-Flop | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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August 1998
100351
Low Power Hex D Flip-Flop
General Description
The 100351 contains six D-type edge-triggered, master/
slave flip-flops with true and complement outputs, a pair of
common Clock inputs (CPa and CPb) and common Master
Reset (MR) input. Data enters a master when both CPa and
CPb are LOW and transfers to the slave when CPa and CPb
(or both) go HIGH. The MR input overrides all other inputs
and makes the Q outputs LOW. All inputs have 50 kΩ
pull-down resistors.
Features
n 40% power reduction of the 100151
n 2000V ESD protection
n Pin/function compatible with 100151
n Voltage compensated operating range:
−4.2V to −5.7V
n Standard Microcircuit Drawing
(SMD) 5962-9457901
Logic Symbol
Pin Names
D0– D5
CPa, CPb
MR
Q0– Q5
Q0– Q5
Description
Data Inputs
Common Clock Inputs
Asynchronous Master Reset Input
Data Outputs
Complementary Data Outputs
DS100318-11
© 1998 National Semiconductor Corporation DS100318
www.national.com
1 page  
Test Circuitry (Continued)
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 50Ω to GND
CL = Jig and stray capacitance ≤ 3 pF
Switching Waveforms
DS100318-6
FIGURE 2. Toggle Frequency Test Circuit
DS100318-7
FIGURE 3. Propagation Delay (Clock) and Transition Times
5 www.national.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 100351.PDF ] | |
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