DataSheet.es    


PDF 100329A Data sheet ( Hoja de datos )

Número de pieza 100329A
Descripción Low Power Octal ECL/TTL Bidirectional Translator with Register
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



Hay una vista previa y un enlace de descarga de 100329A (archivo pdf) en la parte inferior de esta página.


Total 8 Páginas

No Preview Available ! 100329A Hoja de datos, Descripción, Manual

August 1989
Revised August 2000
100329A
Low Power Octal ECL/TTL Bidirectional Translator with
Register
General Description
The 100329A is an octal registered bidirectional translator
designed to convert TTL logic levels to 100K ECL logic lev-
els and vice versa. The direction of the translation is deter-
mined by the DIR input. A LOW on the output enable input
(OE) holds the ECL outputs in a cut-off state and the TTL
outputs at a high impedance level. The outputs change
synchronously with the rising edge of the clock input (CP)
even though only one output is enabled at the time.
The cut-off state is designed to be more negative than a
normal ECL LOW level. This allows the output emitter-fol-
lowers to turn off when the termination supply is 2.0V, pre-
senting a high impedance to the data bus. This high
impedance reduces the termination power and prevents
loss of low state noise margin when several loads share
the bus.
The 100329A is designed with FASTTTL output buffers,
featuring optimal DC drive and capable of quickly charging
and discharging highly capacitive loads. All inputs have
50 kpull-down resistors.
Features
s Bidirectional translation
s ECL high impedance outputs
s Registered outputs
s FAST TTL outputs
s 3-STATE outputs
s Voltage compensated operating range = −4.2V to 5.7V
s High drive IOS
Ordering Code:
Order Number Package Number
Package Description
100329APC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
E0E7
T0T7
OE
ECL Data I/O
TTL Data I/O
Output Enable Input
CP Clock Pulse Input
(Active Rising Edge)
DIR Direction Control Input
All pins function at 100K ECL levels except for T0–T7.
FASTis a registered trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation DS500047
www.fairchildsemi.com

1 page




100329A pdf
Test Circuitry (TTL-to-ECL)
Note: RT = 50termination resistive load. When an input or output is being monitored by a scope, RTis supplied by the scopes 50input resistance. When
an input or output is not being monitored, an external 50resistance must be applied to serve as RT.
Note: TTL and ECL force signals are brought to the DUT via 50coax lines.
Note: VTTL is decoupled to ground with 0.1 µF, VEE is decoupled to ground with 0.01 µF and VCC is connected to ground.
FIGURE 1. TTL-to-ECL AC Test Circuit
Switching Waveforms (TTL-to-ECL)
FIGURE 2. TTL to ECL Transition—Propagation Delay and Transition Times
5 www.fairchildsemi.com

5 Page










PáginasTotal 8 Páginas
PDF Descargar[ Datasheet 100329A.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
100329Low Power Octal ECL/TTL Bidirectional Translator with RegisterNational Semiconductor
National Semiconductor
100329Low Power Octal ECL/TTL Bidirectional Translator with RegisterFairchild Semiconductor
Fairchild Semiconductor
100329ALow Power Octal ECL/TTL Bidirectional Translator with RegisterFairchild Semiconductor
Fairchild Semiconductor
100329APCLow Power Octal ECL/TTL Bidirectional Translator with RegisterFairchild Semiconductor
Fairchild Semiconductor

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar