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PDF 100325F Data sheet ( Hoja de datos )

Número de pieza 100325F
Descripción Low Power Hex ECL-to-TTL Translator
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! 100325F Hoja de datos, Descripción, Manual

August 1998
100325
Low Power Hex ECL-to-TTL Translator
General Description
The 100325 is a hex translator for converting F100K logic
levels to TTL logic levels. Differential inputs allow each circuit
to be used as an inverting, non-inverting or differential re-
ceiver. An internal reference voltage generator provides VBB
for single-ended operation, or for use in Schmitt trigger appli-
cations. All inputs have 50 kpull-down resistors. When the
inputs are either unconnected or at the same potential the
outputs will go low.
When used in single-ended operation the apparent input
threshold of the true inputs is 20 mV to 40 mV higher (posi-
tive) than the threshold of the complementary inputs. The
VEE and VTTL power may be applied in either order.
Features
n Pin/function compatible with 100125
n Meets 100125 AC specifications
n 50% power reduction of the 100125
n Differential inputs with built in offset
n Standard FAST® outputs
n 2000V ESD protection
n −4.2V to −5.7V operating range
n Available to Microcircuit Drawing
(SMD) 5962-9153101
Logic Diagram
Pin Names
D0– D5
D0– D5
Q0– Q5
Description
Data Inputs
Inverting Data Inputs
Data Outputs
DS100314-4
FAST® is a registered trademark of Fairchild Semiconductor.
© 1998 National Semiconductor Corporation DS100314
www.national.com

1 page




100325F pdf
Test Circuits
Notes:
VCC = 0V, VEE = −4.5V, VTTL = +5V
L1 and L2 = equal length 50impedance lines
RT = 50terminator internal to scope
Decoupling 0.1 µF from GND to VCC, VEE and VTTL
All unused outputs are loaded with 500to GND
CL = Fixture and stray capacitance = 15 pF
FIGURE 2. AC Test Circuit for 15 pF Loading
DS100314-5
5 www.national.com

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