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PDF 100316 Data sheet ( Hoja de datos )
| Número de pieza | 100316 | |
| Descripción | Low Power Quad Differential Line Driver with Cut-Off | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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May 1991
Revised November 1999
100316
Low Power Quad Differential Line Driver with Cut-Off
General Description
The 100316 is a quad differential line driver with output cut-
off capability. The outputs are designed to drive a doubly
terminated 50Ω transmission line (25Ω equivalent imped-
ance) in an ECL backplane. The 100316 is ideal for driving
low noise, differential ECL backplanes. A LOW on the out-
put enable (OE) will set both the true and complementary
outputs into a high impedance or cut-off state, isolating
them from the backplane. The cut-off state is designed to
be more negative than a normal ECL LOW state.
Unlike most 100K devices, the data inputs (Dn, Dn) do not
have input pull-down resistors. An internal reference supply
(VBB) is available for single-ended operation.
Features
s Differential inputs and outputs
s Output cut-off capability
s Drives 25Ω load
s VBB available for single-ended operation
s 2000V ESD protection
s Voltage compensated operating range = −4.2V to −5.7V
s Available to industrial grade temperature range
Ordering Code:
Order Number Package Number
Package Description
100316QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100316QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
28-Pin PLCC
Pin Descriptions
Pin Names
Dn
Qn
Qn
OE
Description
Data Inputs
Data Outputs
Complementary Data Outputs
Output Enable
© 1999 Fairchild Semiconductor Corporation DS010922
www.fairchildsemi.com
1 page  
Test Circuitry
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 25Ω to GND
CL = Fixture and stray capacitance ≤ 3 pF
Switching Waveforms
FIGURE 1. AC Test Circuit
FIGURE 2. Propagation Delay, Cut-Off and Transition Times
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 100316.PDF ] | |
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