DataSheet.es    


PDF DAC8408FS Data sheet ( Hoja de datos )

Número de pieza DAC8408FS
Descripción Quad 8-Bit Multiplying CMOS D/A Converter with Memory
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



Hay una vista previa y un enlace de descarga de DAC8408FS (archivo pdf) en la parte inferior de esta página.


Total 16 Páginas

No Preview Available ! DAC8408FS Hoja de datos, Descripción, Manual

a
Quad 8-Bit Multiplying CMOS
D/A Converter with Memory
DAC8408
FEATURES
Four DACs in a 28 Pin, 0.6 Inch Wide DIP or 28-Pin JEDEC
Plastic Chip Carrier
؎1/4 LSB Endpoint Linearity
Guaranteed Monotonic
DACs Matched to Within 1%
Microprocessor Compatible
Read/Write Capability (with Memory)
TTL/CMOS Compatible
Four-Quadrant Multiplication
Single-Supply Operation (+5 V)
Low Power Consumption
Latch-Up Resistant
Available In Die Form
APPLICATIONS
Voltage Set Points in Automatic Test Equipment
Systems Requiring Data Access for Self-Diagnostics
Industrial Automation
Multichannel Microprocessor-Controlled Systems
Digitally Controlled Op Amp Offset Adjustment
Process Control
Digital Attenuators
GENERAL DESCRIPTION
The DAC8408 is a monolithic quad 8-bit multiplying digital-to-
analog CMOS converter. Each DAC has its own reference input,
feedback resistor, and onboard data latches that feature
read/write capability. The readback function serves as memory
for those systems requiring self-diagnostics.
A common 8-bit TTL/CMOS compatible input port is used to
load data into any of the four DAC data-latches. Control lines
DS1, DS2, and A/B determine which DAC will accept data.
Data loading is similar to that of a RAMs write cycle. Data can
be read back onto the same data bus with control line R/W. The
DAC8408 is bus compatible with most 8-bit microprocessors,
including the 6800, 8080, 8085, and Z80. The DAC8408 oper-
ates on a single +5 volt supply and dissipates less than 20 mW.
The DAC8408 is manufactured using PMI’s highly stable,
thin-film resistors on an advanced oxide-isolated, silicon-gate,
CMOS process. PMI’s improved latch-up resistant design elimi-
nates the need for external protective Schottky diodes.
ORDERING INFORMATION1
Model
Temperature Package
INL DNL Range
Description
DAC8408GP ± 1/4 LSB ± 1/2 LSB 0°C to +70°C
DAC8408ET ± 1/4 LSB ± 1/2 LSB –40°C to +85°C
DAC8408AT2 ± 1/4 LSB ± 1/2 LSB –55°C to +125°C
DAC8408FT ± 1/2 LSB ± 1 LSB –40°C to +85°C
DAC8408BT2 ± 1/2 LSB ± 1 LSB –55°C to +125°C
DAC8408FPC3 ± 1/2 LSB ± 1 LSB –40°C to +85°C
DAC8408FS ± 1/2 LSB ± 1 LSB –40°C to +85°C
DAC8408FP ± 1/2 LSB ± 1 LSB –40°C to +85°C
28-Pin Plastic DIP
28-Pin Cerdip
28-Pin Cerdip
28-Pin Cerdip
28-Pin Cerdip
28-Contact PLCC
28-Pin SOL
28-Pin Plastic DIP
NOTES
1Burn-in is available on commercial and industrial temperature range parts
in cerdip, plastic DIP, and TO-can packages. For outline information see Pack-
age Information section.
2For devices processed in total compliance to MIL-STD-883, add /883 after
part number. Consult factory for 883 data sheet.
3For availability and burn-in information on SO and PLCC packages, contact
your local sales office.
FUNCTIONAL BLOCK DIAGRAM
DAC8408
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703

1 page




DAC8408FS pdf
DAC8408
WAFER TEST LIMITS at VDD = +5 V; VREF = ؎10 V; VOUTA, B, C, D = 0 V; TA = +25؇C, unless otherwise noted. Specifications apply for
DAC A, B, C, & D.
Parameter
Symbol
Conditions
DAC8408G
Limits
Units
STATIC ACCURACY
Resolution
Nonlinearity1
Differential Nonlinearity
Gain Error
Power Supply Rejection
(VDD = ± 10%)2
IOUT 1A, B, C, D Leakage Current
N
INL
DNL
GFSE
PSR
ILKG
VREF = +10 V
Using Internal RFB
Using Internal RFB
All Digital Inputs = 0 V
REFERENCE INPUT
Reference Input
Resistance3
Input Resistance Match
RIN
RIN
DIGITAL INPUTS
Digital Input Low
Digital Input High
Input Current4
VIL
VIH
IIN
DATA BUS OUTPUTS
Digital Output Low
Digital Output High
Output Leakage Current
VOL
VOH
ILKG
1.6 mA Sink
400 µA Source
POWER SUPPLY
Supply Current5
Supply Current6
IDD
IDD
NOTES
1This is an endpoint linearity specification.
2FSR is Full Scale Range = VREF –1 LSB.
3Input Resistance Temperature Coefficient approximately equals +300 ppm/ °C.
4Logic inputs are MOS gates.Typical input current at +25°C is less than 10 nA.
5All Digital Inputs are either “0” or VDD.
6All Digital Inputs are either VIH or VIL.
8
± 1/2
±1
±1
0.001
± 30
6/14
±1
0.8
2.4
± 1.0
0.4
4
± 1.0
50
1.0
Bits min
LSB max
LSB max
LSB max
%FSR/% max
nA max
kmin/max
% max
V max
V min
µA max
V max
V min
µA max
µA max
mA max
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. A
–5–

5 Page





DAC8408FS arduino
DAC8408
Figure 7. Quad DAC Bipolar Operation (4-Quadrant Multiplication)
Table II. Bipolar (Offset Binary) Code Table
(Refer to Figure 7)
DAC Data Input
MSB
LSB
Analog Output
(DAC A OR DAC B)
11111111
10000001
10000000
01111111
00000001
00000000
NOTE
1
1 LSB = (2–7) (VREF) = 128 (VREF)
+VREF
127
128
+VREF
1
128
0
–VREF
1
128
127
–VREF 128
128
–VREF 128
APPLICATION HINTS
General Ground Management: AC or transient voltages be-
tween AGND and DGND can appear as noise at the DAC8408’s
analog output. Note that in Figures 5 and 6, IOUT2A/IOUT2B and
IOUT 2C/IOUT 2D are connected to AGND. Therefore, it is rec-
ommended that AGND and DGND be tied together at the
DAC8408 socket. In systems where AGND and DGND are tied
together on the backplane, two diodes (1N914 or equivalent)
should be connected in inverse parallel between AGND and
DGND.
Write Enable Timing: During the period when both DS and
R/W are held low, the DAC latches are transparent and the ana-
log output responds directly to the digital data input. To pre-
vent unwanted variations of the analog output, the R/W should
not go low until the data bus is fully settled (DATA VALID).
REV. A
–11–

11 Page







PáginasTotal 16 Páginas
PDF Descargar[ Datasheet DAC8408FS.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
DAC8408FPQuad 8-Bit Multiplying CMOS D/A Converter with MemoryAnalog Devices
Analog Devices
DAC8408FPCQuad 8-Bit Multiplying CMOS D/A Converter with MemoryAnalog Devices
Analog Devices
DAC8408FSQuad 8-Bit Multiplying CMOS D/A Converter with MemoryAnalog Devices
Analog Devices
DAC8408FTQuad 8-Bit Multiplying CMOS D/A Converter with MemoryAnalog Devices
Analog Devices

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar