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PDF DAC8222FS Data sheet ( Hoja de datos )
| Número de pieza | DAC8222FS | |
| Descripción | Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
Dual 12-Bit Double-Buffered
Multiplying CMOS D/A Converter
DAC8222
FEATURES
Two Matched 12-Bit DACs on One Chip
Direct Parallel Load of All 12 Bits for High Data
Throughput
Double-Buffered Digital Inputs
12-Bit Endpoint Linearity (؎1/2 LSB) Over Temperature
+5 V to +15 V Single Supply Operation
DACs Matched to 1% Max
Four-Quadrant Multiplication
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Lead DIP and 0.3"
24- Lead SOL Package
Available in Die Form
APPLICATIONS
Automatic Test Equipment
Robotics/Process Control/Automation
Digital Gain/Attenuation Control
Ideal for Battery-Operated Equipment
FUNCTIONAL DIAGRAM
GENERAL DESCRIPTION
The DAC8222 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has a 12-bit wide data port that allows a
12-bit word to be loaded directly. This achieves faster through-
put time in stand-alone systems or when interfacing to a 16-bit
processor. A common 12-bit input TTL/CMOS compatible
data port is used to load the 12-bit word into either of the two
DACs. This port, whose data loading is similar to that of a RAM’s
write cycle, interfaces directly with most 12-bit and 16-bit bus
systems. (See DAC8248 for a complete 8-bit data bus interface
product.) A common bus allows the DAC8222 to be packaged
in a narrow 24-lead 0.3" DIP and save PCB space.
The DAC is controlled with two signals, WR and LDAC. With
logic low at these inputs, the DAC registers become transparent.
This allows direct unbuffered data to flow directly to either
DAC output selected by DAC A/DAC B. Also, the DAC’s
double-buffered digital inputs will allow both DACs to be
simultaneously updated.
DAC8222’s monolithic construction offers excellent DAC-to-
DAC matching and tracking over the full operating tempera-
ture range. The chip consists of two thin-film R-2R resistor
ladder networks, four 12-bit registers, and DAC control logic
circuitry. The device has separate reference-input and feedback
resistors for each DAC and operates on a single supply from
+5 V to +15 V. Maximum power dissipation at +5 V using
zero or VDD logic levels is less than 0.5 mW.
The DAC8222 is manufactured with highly stable thin-film re-
sistors on an advanced oxide-isolated, silicon-gate, CMOS
technology. Improved latch-up resistant design eliminates the
need for external protective Schottky diodes.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
1 page  
TYPICAL PERFORMANCE CHARACTERISTICS
DAC8222
Figure 1. Channel-to-Channel Match-
ing (DAC A and B are Superimposed)
Figure 2. Differential Nonlinearity
vs. VREF
Figure 3. Differential Nonlinearity
vs. VREF
Figure 4. Nonlinearity vs. VREF
Figure 5. Nonlinearity vs. VREF
Figure 6. Nonlinearity vs. VDD
Figure 7. Nonlinearity vs. Code
(DAC A and B are Superimposed)
Figure 8. Nonlinearity vs. Code at TA
= –55°C, +25°C, +125°C for DAC A and
B (All Superimposed)
Figure 9. Absolute Gain Error
Changes vs. VREF
REV. C
–5–
5 Page 
DAC8222
Figure 25. Bipolar Configuration (Four-Quadrant Multiplication)
Table III. Bipolar (Offset Binary) Code Table
(Refer to Figure 25)
Binary Number in
DAC Register
MSB
LSB
Analog Output, VOUT
(DAC A or DAC B)
1111 1111 1111
1000 0000 0001
2047
+VREF 2048
1
+VREF 2048
1000 0000 0000
0V
0111 1111 1111
0000 0000 0000
1
–VREF 2048
2048
–VREF 2048
NOTE
1
1 LSB = (2–11) (VREF) = 2048 (VREF)
resistors R5, R6, R7, should be ratio-matched to 0.01% so that
gain error meets data sheet specifications. (Corresponding resis-
tors, R8, R9, and R10 for DAC B should also be matched to
0.01%). The resistors should have identical temperature coeffi-
cients if operating over the full temperature range.
Zero and full-scale are adjusted one of two ways and are at the
user’s discretion. Zero-output can be adjusted by first setting
the digital inputs to 1000 0000 0000 and adjusting R1 (R3 for
DAC B) so that VOUTA (or VOUT B) equals 0 V. If R1, R2 (R3,
R4 for DAC B) are omitted, then VOUT = 0 V can be adjusted
by varying R6, R7 (R9, R10 for DAC B) ratios. Full-scale is ad-
justed by setting the digital inputs to 1111 1111 1111 and vary-
ing R5 (R8 for DAC B). Full-scale can also be adjusted by
varying VREF. Full-scale output is equal to VREF minus one LSB.
REV. C
–11–
11 Page | ||
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| PDF Descargar | [ Datasheet DAC8222FS.PDF ] | |
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