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PDF DAC7731EB Data sheet ( Hoja de datos )

Número de pieza DAC7731EB
Descripción 16-Bit/ Voltage Output/ Serial Input DIGITAL-TO-ANALOG CONVERTER
Fabricantes Burr-Brown Corporation 
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No Preview Available ! DAC7731EB Hoja de datos, Descripción, Manual

DAC7731
DAC7731
SBAS249 – DECEMBER 2001
16-Bit, Voltage Output, Serial Input
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q LOW POWER: 150mW MAXIMUM
q +10V INTERNAL REFERENCE
q UNIPOLAR OR BIPOLAR OPERATION
q SETTLING TIME: 5µs to ±0.003% FSR
q 16-BIT MONOTINICITY, –40°C TO +85°C
q ±10V, ±5V, OR +10V CONFIGURABLE VOLTAGE
OUTPUT
q RESET TO ZERO OR MID-SCALE
q DOUBLE-BUFFERED DATA INPUT
q DAISY-CHAIN FEATURE FOR MULTIPLE
DAC7731s ON A SINGLE BUS
q SMALL SSOP-24 PACKAGE
APPLICATIONS
q PROCESS CONTROL
q ATE PIN ELECTRONICS
q CLOSED-LOOP SERVO CONTROL
q MOTOR CONTROL
q DATA ACQUISITION SYSTEMS
DESCRIPTION
The DAC7731 is a 16-bit Digital-to-Analog Converter (DAC)
which provides 16 bits of monotonic performance over the
specified operating temperature range and offers a +10V
internal reference. Designed for automatic test equipment
and industrial process control applications, the DAC7731’s
output swing can be configured in a ±10V, ±5V, or +10V
range. The flexibility of the output configuration allows the
DAC7731 to provide both unipolar and bipolar operation by
pin strapping. The DAC7731 includes a high-speed output
amplifier with a maximum settling time of 5µs to ±0.003%
FSR for a 20V full-scale change and only consumes 100mW
(typical) of power.
The DAC7731 features a standard 3-wire, SPI-compatible
serial interface with double buffering to allow asynchronous
updates of the analog output as well as a serial data output
line for daisy-chaining multiple DAC7731’s. A user program-
mable reset control forces the DAC output to either min-scale
(0000H) or mid-scale (8000H), overriding both the input and
DAC register values. The DAC7731 is available in a
SSOP-24 package and three performance grades specified
to operate from –40°C to +85°C.
VDD VSS VCC
REFADJ REFOUT REFIN
VREF
REFEN
RSTSEL
RST
LDAC
SCLK
CS
SDO
SDI
+10V
Reference
Control
Logic
Enable
Input
Register
DAC
Register
Buffer
DAC
ROFFSET
RFB2
RFB1
SJ
VOUT
AGND DGND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 2001, Texas Instruments Incorporated

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DAC7731EB pdf
TYPICAL CHARACTERISTICS
TA = +25°C (unless otherwise noted).
LINEARITY ERROR AND DIFFERENTIAL
LINEARITY ERROR vs DIGITAL INPUT CODE
6
4
2
0
2
4
6
Bipolar Configuration: VOUT = 10V to +10V
TA = 85°C, Internal Reference Enabled
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
LINEARITY ERROR AND DIFFERENTIAL
LINEARITY ERROR vs DIGITAL INPUT CODE
6
4
2
0
2
4
6
Bipolar Configuration: VOUT = 10V to +10V
TA = 25°C, Internal Reference Enabled
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
LINEARITY ERROR AND DIFFERENTIAL
LINEARITY ERROR vs DIGITAL INPUT CODE
6
4
2
0
2
4
6
Bipolar Configuration: VOUT = 10V to +10V
TA = 40°C, Internal Reference Enabled
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
2.0
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
1.00
OFFSET ERROR vs TEMPERATURE
0.75
0.50
0.25
VOUT = 0 to +10V
VOUT = 10 to +10V
0.00
0.25
0.50
0.75
1.00
40
15
10 35
Temperature (°C)
60
85
0.000
GAIN ERROR vs TEMPERATURE
0.010
0.020
Ext. Ref, Unipolar Mode: VOUT = 0 to +10V
0.030
0.040
0.050
Ext. Ref, Bipolar Mode: VOUT = 10 to +10V
Int. Ref, Unipolar Mode: VOUT = 0 to +10V
0.060
0.070
0.080
0.090
0.100
Int. Ref, Bipolar Mode: VOUT = 10 to +10V
Load = 200pF, 2k
40 15 10 35 60 85
Temperature (°C)
VCC SUPPLY CURRENT vs DIGITAL INPUT CODE
4.4 Bipolar Configuration: VOUT = 10V to +10V
4.3 Internal Reference Enabled, TA = 25°C
4.2
4.1
4.0
3.9
3.8
3.7
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
DAC7731
SBAS249
www.ti.com
5

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DAC7731EB arduino
VCC
0.1µF 1µF
(10V to +10V)
VDD
0.1µF
1µF
DAC7731
1 VCC
2 REFOUT
3 REFIN
4 REFADJ
VSS 24
REFEN 23
RSTSEL 22
SCLK 21
5 VREF
6 ROFFSET
7 AGND
CS 20
SDO 19
SDI 18
8 RFB2
LDAC 17
9 RFB1
RST 16
10 SJ
NC 15
11 VOUT
12 VDD
TEST 14
DGND 13
VSS
1µF 0.1µF
Control/Data
Bus
REFSEL
1
0
ACTION
Internal Reference disabled;
REFOUT = High Impedance
Internal Reference enabled;
REFOUT = +10V
TABLE I. REFEN Action.
DIGITAL INTERFACE
Table II shows the input data format for the DAC7731 and
Table III illustrates the basic control logic of the device. The
serial interface consists of a chip select input (CS), serial data
clock input (SCLK), serial data input (SDI), serial data output
(SDO), and load control input (LDAC). An asynchronous reset
input (RST), which is active LOW, is provided to simplify start-
up conditions, periodic resets, or emergency resets to a known
state, depending on the status of the reset select (RSTSEL)
signal. Please refer to the "DAC Reset" section for additional
information regarding the reset operation.
FIGURE 4. Basic Operation: VOUT = 10V to +10V.
ANALOG OUTPUTS
The output amplifier can swing to within 1.4V of the supply
rails, specified over the 40°C to +85°C temperature range.
This allows for a ±10V DAC voltage output operation from
±12V supplies with a typical 5% tolerance.
When the DAC7731 is configured for a unipolar, 0V to 10V
output, a negative voltage supply is required. This is due to
internal biasing of the output stage. Please refer to the
Electrical Characteristicstable for more information.
The minimum and maximum voltage output values are de-
pendent upon the output configuration implemented and
reference voltage applied to the DAC7731. Please note that
VSS (the negative power supply) must be in the range of
4.75V to 15.75V for unipolar operation. The voltage on VSS
sets several bias points within the converter and is required
in all modes of operation. If VSS is not in one of these two
configurations, the bias values may be in error and proper
operation of the device is not ensured.
REFERENCE INPUTS
The DAC7731 provides a built-in +10V voltage reference and
on-chip buffer to allow external component reference drive. To
use the internal reference, REFEN must be LOW, enabling the
reference circuitry of the DAC7731 (as shown in Table I) and
the REFOUT pin must be connected to REFIN. This is the input
to the on-chip reference buffer. The buffers output is provided
at the VREF pin. In this configuration, VREF is used to setup the
DAC7731 output amplifier into one of three voltage output
modes as discussed earlier. VREF can also be used to drive
other system components requiring an external reference.
The internal reference of the DAC7731 can be disabled when
use of an external reference is desired. When using an
external reference, the reference input, REFIN, can be any
voltage between 4.75V (or VSS + 14V, whichever is greater)
and VCC 1.4V.
ANALOG OUTPUT
DIGITAL INPUT Unipolar Configuration
Bipolar Configuration
0x0000
0x0001
:
0x8000
0x8001
:
0xFFFF
Unipolar Straight Binary
Zero (0V)
Zero + 1LSB
:
1/2 Full-Scale
1/2 Full-Scale + 1LSB
:
Full-Scale (VREF 1LSB)
TABLE II. DAC7731 Data Format.
Bipolar Offset Binary
Full-Scale (VREF or VREF/2)
Full-Scale + 1LSB
:
Bipolar Zero
Bipolar Zero + 1LSB
:
+Full-Scale (+VREF 1LSB
or +VREF/2 1LSB)
CONTROL STATUS
COMMAND
CS RST RSTSEL LDAC SCLK
ACTION
HH X
X X Shift Register is disabled on the serial bus.
LH X
Enable SDO pin from High Impedance;
X X enables shift operation and I/O bus
(SCLK, SDI, SDO).
LH X
X Serial Data Shifted into Input Register
H
X
X L Serial Data Shifted into Input Register(1)
XH X
X Data in Input Register is Loaded into DAC Register.
XL
H
X X Resets Input and DAC Registers to mid-scale.
XL
L
X X Resets Input and DAC Registers to min-scale.
NOTE: (1) In order to avoid unwanted shifting of the input register by an
additional bit, care must be taken that a rising edge on CS only occurs
when SCLK is HIGH.
TABLE III. DAC7731 Logic Truth Table.
The DAC code is provided via a 16-bit serial interface, as shown
in Table II. The digital input word makes up the digital code to
be loaded into the data input register of the device. A typical
data transfer and DAC output update takes place as follows:
Once CS is active (LOW), the DAC7731 is enabled on the serial
bus and the 16-bit serial data transfer can begin. The serial data
is shifted into the device on each rising SCLK edge until all 16
bits are transferred (1 bit per 1 rising SCLK edge). Once
received, the data in the input register is loaded into the DAC
register upon reception of a rising edge on the LDAC input (load
command). This action updates the analog output, VOUT, to the
desired voltage specified by the digital input word. A rising edge
DAC7731
SBAS249
www.ti.com
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