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PDF DAC7724UB Data sheet ( Hoja de datos )

Número de pieza DAC7724UB
Descripción 12-Bit Quad Voltage Output DIGITAL-TO-ANALOG CONVERTER
Fabricantes Burr-Brown Corporation 
Logotipo Burr-Brown Corporation Logotipo



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No Preview Available ! DAC7724UB Hoja de datos, Descripción, Manual

®
DAC7724
DAC7725
DAC7724
DAC7725
For most current data sheet and other product
information, visit www.burr-brown.com
12-Bit Quad Voltage Output
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q LOW POWER: 250mW max
q SINGLE SUPPLY OUTPUT RANGE: +10V
q DUAL SUPPLY OUTPUT RANGE: ±10V
q SETTLING TIME: 10µs to 0.012%
q 12-BIT LINEARITY AND MONOTONICITY:
–40°C to +85°C
q RESET TO MID-SCALE (DAC7724) OR
ZERO-SCALE (DAC7725)
q DATA READBACK
q DOUBLE-BUFFERED DATA INPUTS
APPLICATIONS
q PROCESS CONTROL
q CLOSED-LOOP SERVO-CONTROL
q MOTOR CONTROL
q DATA ACQUISITION SYSTEMS
GND
DB0-DB11
12 I/O
Buffer
Input
Register A
DESCRIPTION
The DAC7724 and DAC7725 are 12-bit quad voltage
output digital-to-analog converters with guaranteed
12-bit monotonic performance over the specified tem-
perature range. They accept 12-bit parallel input data,
have double-buffered DAC input logic (allowing simul-
taneous update of all DACs), and provide a readback
mode of the internal input registers. An asynchronous
reset clears all registers to a mid-scale code of 800H
(DAC7724) or to a zero-scale of 000H (DAC7725). The
DAC7724 and DAC7725 can operate from a single
+15V supply, or from +15V and –15V supplies.
Low power and small size per DAC make the DAC7724
and DAC7725 ideal for automatic test equipment,
DAC-per-pin programmers, data acquisition systems,
and closed-loop servo-control. The DAC7724 and
DAC7725 are available in a PLCC-28 or a SO-28
package, and offer guaranteed specifications over the
–40°C to +85°C temperature range.
VDD
VCC VREFH
DAC
Register A
DAC A
VOUTA
Input
Register B
DAC
Register B
DAC B
A0
A1
R/W
CS
Control
Logic
Input
Register C
DAC
Register C
DAC C
Input
Register D
DAC
Register D
DAC D
VOUTB
VOUTC
VOUTD
RESET LDAC VREFL
VSS
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1999 Burr-Brown Corporation
PDS-1517B
Printed in U.S.A. April, 2000

1 page




DAC7724UB pdf
PIN CONFIGURATIONS
Top View
SO
VREFH 1
VOUTB 2
VOUTA 3
VSS 4
GND 5
RESET 6
LDAC 7
(LSB) DB0 8
DB1 9
DB2 10
DB3 11
DB4 12
DB5 13
DB6 14
DAC7724
DAC7725
28 VREFL
27 VOUTC
26 VOUTD
25 VCC
24 VDD
23 CS
22 A0
21 A1
20 R/W
19 DB11 (MSB)
18 DB10
17 DB9
16 DB8
15 DB7
PLCC
GND 5
RESET 6
LDAC 7
(LSB) DB0 8
DB1 9
DB2 10
DB3 11
4 3 2 1 28 27 26
DAC7724
DAC7725
25 VCC
24 VDD
23 CS
22 A0
21 A1
20 R/W
19 DB11 (MSB)
12 13 14 15 16 17 18
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
1
VREFH
Reference Input Voltage High. Sets maximum output voltage for all DACs.
2
VOUTB
DAC B Voltage Output.
3
VOUTA
DAC A Voltage Output.
4 VSS Negative Analog Supply Voltage, 0V or –15V.
5
GND
Ground.
6
RESET
Asynchronous Reset Input. Sets DAC and input registers to either mid-scale (800H, DAC7724) or zero-scale (000H, DAC7725)
when LOW.
7
LDAC
Load DAC Input. All DAC Registers are transparent when LOW.
8
DB0
Data Bit 0. Least significant bit of 12-bit word.
9
DB1
Data Bit 1
10
DB2
Data Bit 2
11
DB3
Data Bit 3
12
DB4
Data Bit 4
13
DB5
Data Bit 5
14
DB6
Data Bit 6
15
DB7
Data Bit 7
16
DB8
Data Bit 8
17
DB9
Data Bit 9
18
DB10
Data Bit 10
19
DB11
Data Bit 11. Most significant bit of 12-bit word.
20
R/W
Read/Write Control Input (read = HIGH, write = LOW).
21 A1 Register/DAC Select (C or D = HIGH, A or B = LOW).
22 A0 Register/DAC Select (B or D = HIGH, A or C = LOW).
23 CS Chip Select Input.
24 VDD Positive Digital Supply, +5V.
25 VCC Positive Analog Supply Voltage, +15V nominal.
26
VOUTD
DAC D Voltage Output.
27
VOUTC
DAC C Voltage Output.
28
VREFL
Reference Input Voltage Low. Sets minimum output voltage for all DACs.
5 DAC7724, 7725
®

5 Page





DAC7724UB arduino
TYPICAL PERFORMANCE CURVES: VSS = –15V (Cont.)
At TA = +25°C, VCC = +15V, VDD = +5V, VSS = –15V, VREFH = +10V, VREFL = –10V, representative unit, unless otherwise specified.
DUAL SUPPLY CURRENT LIMIT vs INPUT CODE
SHORT TO GROUND
20
15
10
5
0
–5
–10
–15
–20
000H
200H
400H
600H 800H A00H
Digital Input Code
C00H
E00H
FFFH
POWER SUPPLY REJECTION RATIO vs FREQUENCY
0
–10
–20
–30
–40
–50 –15V
–60 +15V
–70
–80
–90
–100
+5V
–110
–120
101 102 103 104 105 106
Frequency (Hz)
OUTPUT VOLTAGE
MID-SCALE GLITCH PERFORMANCE
BROADBAND NOISE
7FFH to 800H
800H to 7FFH
Time (1µs/div)
+5V
LDAC
0
BW = 1MHz
Code = 800H
Time (1ms/div)
1000
OUTPUT NOISE vs FREQUENCY
100
Noise at any code
10
0 0.1 1 10 100 1000 10000
Frequency (kHz)
11
DATA BUS FEEDTHROUGH GLITCH
Time (0.5µs/div)
+5V
DATA BUS
0
DAC7724, 7725
®

11 Page







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