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PDF ADC0808 Data sheet ( Hoja de datos )
| Número de pieza | ADC0808 | |
| Descripción | 8-Bit uP Compatible A/D Converters with 8-Channel Multiplexer | |
| Fabricantes | National Semiconductor | |
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ADC0808/ADC0809
July 8, 2009
8-Bit μP Compatible A/D Converters with 8-Channel
Multiplexer
General Description
The ADC0808, ADC0809 data acquisition component is a
monolithic CMOS device with an 8-bit analog-to-digital con-
verter, 8-channel multiplexer and microprocessor compatible
control logic. The 8-bit A/D converter uses successive ap-
proximation as the conversion technique. The converter fea-
tures a high impedance chopper stabilized comparator, a
256R voltage divider with analog switch tree and a successive
approximation register. The 8-channel multiplexer can direct-
ly access any of 8-single-ended analog signals.
The device eliminates the need for external zero and full-scale
adjustments. Easy interfacing to microprocessors is provided
by the latched and decoded multiplexer address inputs and
latched TTL TRI-STATE outputs.
The design of the ADC0808, ADC0809 has been optimized
by incorporating the most desirable aspects of several A/D
conversion techniques. The ADC0808, ADC0809 offers high
speed, high accuracy, minimal temperature dependence, ex-
cellent long-term accuracy and repeatability, and consumes
minimal power. These features make this device ideally suit-
ed to applications from process and machine control to con-
sumer and automotive applications. For 16-channel multi-
plexer with common output (sample/hold port) see ADC0816
data sheet. (See AN-247 for more information.)
Features
■ Easy interface to all microprocessors
■ Operates ratiometrically or with 5 VDC or analog span
adjusted voltage reference
■ No zero or full-scale adjust required
■ 8-channel multiplexer with address logic
■ 0V to VCC input range
■ Outputs meet TTL voltage level specifications
■ ADC0808 equivalent to MM74C949
■ ADC0809 equivalent to MM74C949-1
Key Specifications
■ Resolution
■ Total Unadjusted Error
■ Single Supply
■ Low Power
■ Conversion Time
8 Bits
±½ LSB and ±1 LSB
5 VDC
15 mW
100 μs
Block Diagram
See Ordering Information
© 2009 National Semiconductor Corporation 5672
567201
www.national.com
1 page  
Functional Description
MULTIPLEXER
The device contains an 8-channel single-ended analog signal
multiplexer. A particular input channel is selected by using the
address decoder. Table 1 shows the input states for the ad-
dress lines to select any channel. The address is latched into
the decoder on the low-to-high transition of the address latch
enable signal.
TABLE 1. Analog Channel Selection
SELECTED ANALOG
CHANNEL
ADDRESS LINE
CBA
IN0 L L L
IN1 L L H
IN2 L H L
IN3 L H H
IN4 H L L
IN5 H L H
IN6 H H L
IN7 H H H
CONVERTER CHARACTERISTICS
The Converter
The heart of this single chip data acquisition system is its 8-
bit analog-to-digital converter. The converter is designed to
give fast, accurate, and repeatable conversions over a wide
range of temperatures. The converter is partitioned into 3 ma-
jor sections: the 256R ladder network, the successive ap-
proximation register, and the comparator. The converter's
digital outputs are positive true.
The 256R ladder network approach (Figure 1) was chosen
over the conventional R/2R ladder because of its inherent
monotonicity, which guarantees no missing digital codes.
Monotonicity is particularly important in closed loop feedback
control systems. A non-monotonic relationship can cause os-
cillations that will be catastrophic for the system. Additionally,
the 256R network does not cause load variations on the ref-
erence voltage.
The bottom resistor and the top resistor of the ladder network
in Figure 1 are not the same value as the remainder of the
network. The difference in these resistors causes the output
characteristic to be symmetrical with the zero and full-scale
points of the transfer curve. The first output transition occurs
when the analog signal has reached +½ LSB and succeeding
output transitions occur every 1 LSB later up to full-scale.
The successive approximation register (SAR) performs 8 it-
erations to approximate the input voltage. For any SAR type
converter, n-iterations are required for an n-bit converter. Fig-
ure 2 shows a typical example of a 3-bit converter. In the
ADC0808, ADC0809, the approximation technique is extend-
ed to 8 bits using the 256R network.
The A/D converter's successive approximation register (SAR)
is reset on the positive edge of the start conversion start pulse.
The conversion is begun on the falling edge of the start con-
version pulse. A conversion in process will be interrupted by
receipt of a new start conversion pulse. Continuous conver-
sion may be accomplished by tying the end-of-conversion
(EOC) output to the SC input. If used in this mode, an external
start conversion pulse should be applied after power up. End-
of-conversion will go low between 0 and 8 clock pulses after
the rising edge of start conversion.
The most important section of the A/D converter is the com-
parator. It is this section which is responsible for the ultimate
accuracy of the entire converter. It is also the comparator drift
which has the greatest influence on the repeatability of the
device. A chopper-stabilized comparator provides the most
effective method of satisfying all the converter requirements.
The chopper-stabilized comparator converts the DC input sig-
nal into an AC signal. This signal is then fed through a high
gain AC amplifier and has the DC level restored. This tech-
nique limits the drift component of the amplifier since the drift
is a DC component which is not passed by the AC amplifier.
This makes the entire A/D converter extremely insensitive to
temperature, long term drift and input offset errors.
Figure 4 shows a typical error curve for the ADC0808 as
measured using the procedures outlined in AN-179.
5 www.national.com
5 Page 
567225
FIGURE 11. Ground Referenced Conversion System with
Reference Generating VCC Supply
567226
FIGURE 12. Typical Reference and Supply Circuit
11 www.national.com
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADC0808.PDF ] | |
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