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PDF A29DL324UG-90 Data sheet ( Hoja de datos )

Número de pieza A29DL324UG-90
Descripción 32M-Bit CMOS Low Voltage Dual Operation Flash Memory 4M-Byte by 8-Bit (Byte Mode) / 2M-Word by 16-Bit (Word Mode)
Fabricantes AMIC Technology 
Logotipo AMIC Technology Logotipo



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A29DL324 Series
32M-Bit CMOS Low Voltage Dual Operation Flash Memory
Preliminary 4M-Byte by 8-Bit (Byte Mode) / 2M-Word by 16-Bit (Word Mode)
Features
n Two bank organization enabling simultaneous execution of
erase / program and read
n Bank organization: 2 banks (16 Mbits + 16 Mbits)
n Memory organization:
- 4,194,304 words x 8 bits (BYTE mode)
- 2,097,152 words x 16 bits (WORD mode)
n Sector organization:
71 sectors (8 Kbytes / 4 Kwords × 8 sectors, 64 Kbytes /
32 Kwords × 63 sectors)
n 2 types of sector organization
- T type: Boot sector allocated to the highest address
(sector)
- B type: Boot sector allocated to the lowest address
(sector)
n 3-state output
n Automatic program
- Program suspend / resume
n Unlock bypass program
n Automatic erase
- Chip erase
- Sector erase (sectors can be combined freely)
n Erase suspend / resume
n Program / Erase completion detection
- Detection through data polling and toggle bits
- Detection through RY/ BY pin
n Sector group protection
- Any sector group can be protected
- Any protected sector group can be temporary
unprotected
n Sectors can be used for boot application
n Hardware reset and standby using RESET pin
n Automatic sleep mode
n Boot block sector protect by WP (ACC) pin
n Conforms to common flash memory interface (CFI)
n Extra One Time Protect Sector provided
Part No.
A29DL324
Access
time
(Max.)
90ns
Operating
supply
voltage
2.7V~
3.6V
Power supply current
(Active mode)
(Max.)
16mA 30mA
Standby
current
(Max.)
5A
n Operating ambient temperature: -40 to 85°C
n Program / erase time
- Program: 9.0 µs / byte (TYP.)
11.0 µs / word (TYP.)
- Sector erase: 0.7 s (TYP.)
n Number of program / erase: 1,000,000 times (MIN.)
n Package options
- 48-pin TSOP (I) or 63-ball TFBGA
General Description
The A29DL324 is a flash memory organized of 33,554,432
bits and 71 sectors. Sectors of this memory can be erased
at a low voltage (2.7 to 3.6 V) supplied from a single power
source, or the contents of the entire chip can be erased.
Two modes of memory organization, BYTE mode
(4,194,304 words × 8 bits) and WORD mode (2,097,152
words × 16 bits), are selectable so that the memory can be
programmed in byte or word units.
The A29DL324 can be read while its contents are being
erased or programmed. The memory cell is divided into two
banks. While sectors in one bank are being erased or
programmed, data can be read from the other bank thanks
to the simultaneous execution architecture. The banks are
8 Mbits and 24 Mbits.
This flash memory comes in two types. The T type has a
boot sector located at the highest address (sector) and the
B type has a boot sector at the lowest address (sector).
Because the A29DL324 enables the boot sector to be
erased, it is ideal for storing a boot program. In addition,
program code that controls the flash memory can be also
stored, and the program code can be programmed or
erased without the need to load it into RAM. Eight small
sectors for storing parameters are provided, each of which
can be erased in 8 Kbytes units.
Once a program or erase command sequence has been
executed, an automatic program or automatic erase
function internally executes program or erase and
verification automatically.
Because the A29DL324 can be electrically erased or
programmed by writing an instruction, data can be
reprogrammed on-board after the flash memory has been
installed in a system, making it suitable for a wide range of
applications.
PRELIMINARY (May, 2002, Version 0.0)
1
AMIC Technology, Inc.

1 page




A29DL324UG-90 pdf
A29DL324 Series
Absolute Maximum Ratings*
Storage Temperature (Tstg) . . . . . . . . . . -55°C to + 125°C
Operating Ambient Temperature (TA) . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to + 85°C
Input / Output Voltage with Respect to GND
WP (ACC), RESET . . . . . . . . . . . . -0.5V Note1 to 13.0V
All Pins except WP (ACC), RESET . . . . . . . . . . . . . . .
. . . . . . . . . . . . . -0.5V Note1 to VCC + 0.4 (4.0V max.) Note2
Supply Voltage with Respect to GND (VCC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.0V
Notes:
1. -2.0V (Min.) (Pulse width 20ns)
2. VCC + 0.5V (Max.) (Pulse width 20ns)
Bus Operations
The following table shows the operation modes of the dual
operation flash memory. Before turning on power, input
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of
this device at these or any other conditions above
those indicated in the operational sections of these
specification is not implied or intended. Exposure to
the absolute maximum rating conditions for extended
periods may affect device reliability.
Recommended Operating Conditions
Operating Ambient Temperature (TA) . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . +2.7V to +3.6V
GND ± 0.2 V to the RESET until VCC VCC (min.).
Table 1. A29DL324 Bus Operations
Operation
CE OE WE I/O15, A6 A1 A0
A-1
I/O0 to
I/O7
I/O8 to RESET WP
I/O15
(ACC)
Read (Note)
BYTE mode L L H A-1 Address input Data output Hi-Z
H
X
WORD mode L
LH
X Address input
Data output
HX
Write
BYTE mode L H L A-1 Address input Data input Hi-Z
H Note3
WORD mode L H L
X Address input
Data input
H Note3
Standby
HXX
X XXX
Hi-Z
Hi-Z H
X
Hardware reset / Standby
XXX
X XXX
Hi-Z
Hi-Z L
X
Output Disable
L H H X XXX
Hi-Z
Hi-Z H
X
Temporary Sector Group Unprotect X X X
X XXX
Hi-Z or
VID Note3
Data input / output
Automatic Sleep BYTE mode L L H A-1 Address input Data output Hi-Z
Mode
WORD mode L
LH
X Address input
Data output
H
H
X
X
Boot Block Sector Protect
XXX
X XXX
Hi-Z or
XL
Data input / output
Accelerated Mode BYTE mode L H L A-1 Address input Data input Hi-Z
H VACC
WORD mode L H L
X Address input
Data input
H VACC
Note: When OE = VIL, VIL can be applied to WE . When OE = VIH, a write operation is started.
Remarks: 1. H : VIH, L : VIL, : VIH or VIL, VID : 11.5 V to 12.5 V, VACC : 8.5 V to 9.5 V
2. If an address is held longer than the minimum read cycle time (tRC), the automatic sleep mode is set.
3. If WP (ACC)=VIL, sector 0,1,140, and 141 remain protected. If WP (ACC)=VIH, protection on sectors 0,1,140, and 141
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block
Protection and Unprotection”. If WP (ACC)=VHH, all sectors will be unprotected.
PRELIMINARY (May, 2002, Version 0.0)
5
AMIC Technology, Inc.

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A29DL324UG-90 arduino
A29DL324 Series
Table 4. A29DL324 Bottom Boot Block Sector Address Table (continued)
Bank
Sector
Sector Address Table
Sector Size
Bank Address Table
(Kbytes/
Kwords)
A20 A19 A18 A17 A16 A15 A14 A13 A12
Address Range (in hexadecimal)
Byte Mode
(x 8)
Word Mode
(x16)
Bank 1 SA34 0 1 1 0 1 1 X X X
64/32
1BFFFFH-1B0000H 0DFFFFH- 0D8000H
SA33 0 1 1 0 1 0 X X X
64/32
1AFFFFH-1A0000H 0D7FFFH- 0D0000H
SA32 0 1 1 0 0 1 X X X
64/32
19FFFFH-190000H 0CFFFFH-0C8000H
SA31 0 1 1 0 0 0 X X X
64/32
18FFFFH-180000H 0C7FFFH-0C0000H
SA30 0 1 0 1 1 1 X X X
64/32
17FFFFH-170000H 0BFFFFH-0B8000H
SA29 0 1 0 1 1 0 X X X
64/32
16FFFFH-160000H 0B7FFFH-0B0000H
SA28 0 1 0 1 0 1 X X X
64/32
15FFFFH-150000H 0AFFFFH-0A8000H
SA27 0 1 0 1 0 0 X X X
64/32
14FFFFH-140000H 0AFFFFH-0A0000H
SA26 0 1 0 0 1 1 X X X
64/32
13FFFFH-130000H 09FFFFH-098000H
SA25 0 1 0 0 1 0 X X X
64/32
12FFFFH- 120000H 097FFFH- 090000H
SA24 0 1 0 0 0 1 X X X
64/32
11FFFFH-110000H 08FFFFH-088000H
SA23 0 1 0 0 0 0 X X X
64/32
10FFFFH-100000H 087FFFH-080000H
SA22 0 0 1 1 1 1 X X X
64/32
0FFFFFH-0F0000H 07FFFFH-078000H
SA21 0 0 1 1 1 0 X X X
64/32
0EFFFFH-0E0000H 077FFFH-070000H
SA20 0 0 1 1 0 1 X X X
64/32 0DFFFFH-0D0000H 06FFFFH-068000H
SA19 0 0 1 1 0 0 X X X
64/32 0CFFFFH-0C0000H 067FFFH-060000H
SA18 0 0 1 0 1 1 X X X
64/32
0BFFFFH-0B0000H 05FFFFH-058000H
SA17 0 0 1 0 1 0 X X X
64/32
0AFFFFH-0A0000H 057FFFH-050000H
SA16 0 0 1 0 0 1 X X X
64/32
09FFFFH-090000H 04FFFFH-048000H
SA15 0 0 1 0 0 0 X X X
64/32
08FFFFH-080000H 047FFFH-040000H
SA14 0 0 0 1 1 1 X X X
64/32
07FFFFH-070000H 03FFFFH-038000H
SA13 0 0 0 1 1 0 X X X
64/32
06FFFFH-060000H 037FFFH-030000H
SA12 0 0 0 1 0 1 X X X
64/32
05FFFFH-050000H 02FFFFH-028000H
SA11 0 0 0 1 0 0 X X X
64/32
04FFFFH-040000H 027FFFH-020000H
SA10 0 0 0 0 1 1 X X X
64/32
03FFFFH-030000H 01FFFFH-018000H
SA9 0 0 0 0 1 0 X X X
64/32
02FFFFH-020000H 017FFFH-010000H
SA8 0 0 0 0 0 1 X X X
64/32
01FFFFH-010000H 00FFFFH-008000H
SA7 0 0 0 0 0 0 1 1 1
64/32
00FFFFH-00E000H 007FFFH-007000H
SA6 0 0 0 0 0 0 1 1 0
64/32
00DFFFH-00C000H 006FFFH-006000H
SA5 0 0 0 0 0 0 1 0 1
64/32
00BFFFH-00A000H 005FFFH-005000H
SA4 0 0 0 0 0 0 1 0 0
64/32
009FFFH-008000H 004FFFH-004000H
SA3 0 0 0 0 0 0 0 1 1
64/32
007FFFH-006000H 003FFFH-003000H
SA2 0 0 0 0 0 0 0 1 0
64/32
005FFFH-004000H 002FFFH-002000H
SA1 0 0 0 0 0 0 0 0 1
64/32
003FFFH-002000H 001FFF-001000H
SA0 0 0 0 0 0 0 0 0 0
64/32
001FFFH-000000H 000FFFH-000000H
PRELIMINARY (May, 2002, Version 0.0)
11
AMIC Technology, Inc.

11 Page







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