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PDF ACS411CS Data sheet ( Hoja de datos )

Número de pieza ACS411CS
Descripción Acapella Optical Modem IC
Fabricantes Semtech Corporation 
Logotipo Semtech Corporation Logotipo



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No Preview Available ! ACS411CS Hoja de datos, Descripción, Manual

Acapella Optical Modem IC
ACS411CS Main Features
* Three chip set supporting full duplex serial transmission over
twin optical fiber, one fiber with WDM.
* Configurable parallel microprocessor bus interface.
* Up to 16 independent synchronous data channels.
1 x OC1 (STS1) @ 51.840Mbps
1 x E3/T3
4 x E2, 7 x T2
16 x E1/T1
* Select between NRZ and pseudo-bipolar HDB3/AMI/B3ZS/
B6ZS/B8ZS input data coding types.
* Incorporates 2 x 256kbps maintenance channels with optionof
multi channel operation with a framing signal.
* Link budgets of 27dB with Laser + PIN on single mode fiber.
* Conforms to all jitter attenuation, jitter transfer and input jitter
tolerance specification defined by AT&T, ITU-T and Bellcore
recommendations.
* Bit Error Rate (BER) of < 10-10
* ACS9020 available in 64 pin TQFP and ACS4110 available in
176 pin TQFP package.
8 bit parallel
bus interface
ACS411CS
device setup
mode contr ol
Tx data status
Rx data status
status reset
Twin Fiber Link
ACS411CS
device setup
mode contr ol
Tx data status
Rx data status
status reset
8 bit parallel
bus interface
TPOS1/TNEG1
R POS1/RNEG1
TPOS16/TNEG16 16 transmit data channels RPOS16/RNEG16
RPOS1/RNEG1 16 receive data channels TPOS1/TNEG1
16to1 Mux
1to16 Mux
R POS16/R NEG16
TCLK (16 :1)
R CL K( 16: 1)
16 transmit data clocks
16 receive data clocks
TPOS16/TNEG16
R CL K( 16: 1)
TCLK (16 :1)
TmD1/RmD1
TmD2/RmD2
TmCLK/RmCL K
2 transmit maint. channels
2 receive maint. channels
1 transmit maint. clock
1 receive maint. clock
R mD1 /TmD1
R mD2 /TmD2
R mCLK/TmCL K
1to16 Mux
16to1 Mux
Twin fiber full duplex system using ACS411CS chip set
with external T1/E1 Framer ICs and microprocessor.
General Description
The ACS411CS is a complete controller, driver and receiver chipset supporting
full-duplex synchronous transmission up to 51.840Mbps over single/twin
optical fiber. The designer can share the available bandwidth over 1 to 16
main channels.
In addition to the main channels, the ACS411CS provides two independent
maintenance channels with a data rate selectable up to 256kbps. On the
electrical side the ACS411CS has a selectable interface for either NRZ or
the pseudo bipolar data coding types HDB3/AMI/B3ZS/B6ZS/B8ZS.
The ACS411CS has a parallel microprocessor bus interface. This can be
used for device set-up, diagnostics, control and status analysis. Additional
flags for Tx data status, Rx data status and alarm indication for both near
end and far end receive fail are accessible via the uP interface.
Communicating modems automatically maintain synchronization with each

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ACS411CS pdf
Kohms. It is important that RRMODSET is inserted and
adjusted to its maximum resistance value of 50
Kohms prior to applying power to the ACS9020 for
the first time and prior to following the procedure
detailed in section headed, Laser Adjustment
Procedure.
I
(PMN
-
AVERAGE)
(BIAS
+
MOD)
=
1/
RRMODSET
Where RRMODSET > 1Kohm, tolerance +/- 20%
TXMON and TxFLG
TXMON is used to monitor the current delivered to
the LED or Laser. TXMON is a current source that
proportionally mirrors the current flow through the
LED or Laser. By placing an appropriate external
resistor RTXMON between TXMON and GND, the
voltage developed (referenced to GND), will be
proportional to the transmit current. During the Laser
setup procedure TXMON should be monitored to
ensure that the Laser manufacturer's maximum
current specification is not exceeded.
The transmit current monitor is a current source
flowing from VDD out of pin TXMON. This current is
representative of the Laser/LED drive current.
ITXMON = IBIAS/50 + IMOD/100
I is the Low level bias current.
BIAS
I is the peak Modulation level bias current. The
MOD
average modulation current is half this value.
Average drive current, I = (I + I ) /2
AVG
BIAS
MOD
Therefore I = I /50
TXMON AVG
TXMON may also be employed during normal
operation to continuously check the Laser current.
The voltage developed across R is compared
TXMON
within an internally generated reference voltage of
1.25V. In the event that the reference voltage is
exceeded, the TXFLAG is set High, otherwise it is
set Low. In this way, the value of resistor on TXMON
can be chosen to activate TXFLAG at any desired
transmit current
e.g. If R = 1KW, then TXFLAG will be set if I
TXMON
AVG
exceeds 62.5mA.
If desired, TXFLAG activation can be delayed by
adding a damping capacitor between TXMON and
GND.
Start be setting the current control resistors RRMODSET
and R
to their highest values (at least 50Kohm
RBIASSET
is recommended).
The bias current is then set to the desired level by
adjusting the variable resistor R
Since the bias
RBIASSET.
current sets the optical low-level for the Laser, it is
essential that the Laser driver data inputs are set at
a continuous logic low level. The resistor value
(typically a 50K potentiometer) is reduced until the
desired bias current is achieved or until the desired
low-level optical output power is achieved. It should
be understood that since the bias current is fixed
(not regulated), the low level optical output power
will vary across the temperature and voltage range.
Once the bias current is set, the modulation current
maybe set by adusting the variable resistor R
RMODSET.
The automatic power regulation circuitry for the
modulation current maintains the average optical
output power and not the peak power. For this reason,
during the set-up process in the absence of the
appication data, it is recommended that the Laser
driver is stimulated with a square wave. Most
application data used in fiber optic transmission is
dc-balanced (equal number of ones and zeros), so a
square-wave is an accurate representation of the
real data.
The resistor value (typically a 50K potenmtiometer)
is reduced until the desired optical-high ouput power
is achieved. The modulation ouput power will then
be regulated such that the average ouput optical
output power (bias + modulation) is mainatined over
the recommended temperature and voltage range.
Receive Monitor RXMON and RXFLAG
The ACS9020 incorporates a power meter which
generates a current source on the RXMON pin, which
is proportional to the received signal strength. A
voltage is generated on an internal 50Kohm resistor
which is continuously compared with an internally
generated reference of 1.25 volts.
The RXFLAG is set when the RXMON voltage
exceeds the 1.25 volt reference. The flag is used to
indicate that there is sufficient signal strength to give
a minimum differential output signal on the receiver
output pins DOUTP and DOUTN. If the voltage on
DOUTP/DOUTN exceeds 500 mV peak-to-peak then
the RXMON voltage will exceed 1.25 Volts and the
RXFLAG will be set.
Laser Adjustment Procedure
The output power from the Laser should be measured
with an optical power meter during the setup
procedure. In addition TXMON may be monitored to
ensure that manufacturers maximum current limits
are not exceeded during the set-up process. Select
one of the laser drive modes in accordance with the
section headed, Optical Operational Modes.
Because of process tolerances on the internal resistor
and the internally generated reference voltage, the
RXFLAG should be considered only as a guide to
the receive signal strength. The receive threshold
can be adjusted by placing a 1Mohm external
potentiometer between the RXMON pin and Ground.
5 ACS411CS PRE-RELEASE Issue 6.0 July 1999.

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ACS411CS arduino
TmCLK and the reference clock for the (digital) clock
recovery and de-jittering PLLs (DPLL) for RmCLK
are derived digitally from the system clock for
256kbps by the division factors shown in Table 8. If
lower data rates than 256kbps are selected, the
256kHz clock will be divided down by a factor 2/4/8/
16/32 determined by MSEL(3:1).
Mode
FSys/256 kbps
16 x T1
16 x E1
7 x T2
4 x E2
1 x E3
1 x T3
1 x OC1
271.40625
264
271.21875
264
268.5
262.125
303.75
Table 8: System Clock Division Factors for
Maintenance Clock Generation (256kbps)
ERRC and ERRL - Error Detection
These signals can be used to give an indication of
the quality of the optical link. Even when a DC signal
is applied to the data, maintenance and TCLK inputs,
the ACS411CS modem transmits data over the link
in each direction at the Fsys system frequency. This
transmit and control data is used to maintain the
timing and synchronisation.
The transmit and control data is constantly monitored
to make sure it is compatible with the 8B10B format.
If a coding error is detected ERRL will go High and
will remain High until reset. ERRL may be reset by
asserting PORB, or by removing the fiber optic cable
from one side of the link thereby forcing the device
temporarily out of lock.
ERRC produces a pulse on detection of each coding
error. These pulses may be accumulated by means
of an external electronic counter. In the
microprocessor modes, the value on an internal
accumulating 8 bit counter can be read via the bus
interface address 0x1D.
Please note that ERRL and ERRC detect 8B10B
coding errors and not data errors, nevertheless
because of the complexity of the coding rules
employed on the ACS411CS, the absence of detected
errors on these pins will give a good indication of a
high quality link.
11 ACS411CS PRE-RELEASE Issue 6.0 July 1999.

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