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PDF ACS402-5SB4 Data sheet ( Hoja de datos )
| Número de pieza | ACS402-5SB4 | |
| Descripción | QUAD AC LINE SWITCH ARRAY | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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®
ASD™
AC Switch Family
ACS402-5SB4
QUAD AC LINE SWITCH ARRAY
MAIN APPLICATIONS
s AC on-off static switching in appliance &
industrial control systems
s Drive of low power high inductive or resistive
loads like:
- relay, valve, solenoid, dispenser
- pump, fan, micro-motor
- low power lamp bulb, door lock
FEATURES
)s 4 high voltage AC switch array
t(ss Blocking voltage: VDRM / VRRM = 500V
cs Clamping voltage: VCL = 600V
us Nominal current: IT(RMS) = 0.2 A per switch
ds Nominal current: IT(RMS) = 0.4 A for the total
roarray
Ps Switch integrated driver
s Triggering current is sourced by the gate
tes Gate triggering current : IGT < 10 mA
soleBENEFITS
bs Needs no external overvoltage protection.
Os Enables the equipment to meet IEC61000-4-5
-standard.
)s Miniaturizes 4 switches in 1 package.
t(ss Reduces the switch component count by up to
80%.
ucs Interfaces directly with the microcontroller.
ds Eliminates any stressing gate kick back on the
romicrocontroller.
DIP-20
PIN OUT CONNECTION
1
OUT1
OUT2
OUT3
OUT4
COM
G1
G2
G3
G4
COM
note : pins 1, 3, 5, 7, 9, 12, 14, 16, 18, 20 not connected.
te PDESCRIPTION
leThe ACS402 belongs to the AC line switches array
ofamily built around the ASD™ concept. This high
sperformance device includes 4 bi-directional a.c.
bswitches able to control an 0.2 A resistive or induc-
Otive load device.
FUNCTIONAL DIAGRAM
ACS402
S1
OUT1
OUT2
OUT3
OUT4
S2 S3 S4
Each ACS™ switch integrates a high voltage
clamping structure to absorb the inductive turn off
energy and a gate level shifter driver to separate
the digital controller from each main switch. It is
triggered with a negative gate current flowing out
of the gate pin.
ON
D1
ON
D2
ON
D3
ON
D4
Com
G1
G2
G3 G4
For further technical information, please refer to
AN1172 the Application note.
ASD and ACS are a trademarks of STMicroelectronics .
October 2001 - Ed: 6B
1/8
1 page  
Fig. 5: Maximum power dissipation versus RMS
on-state current (per switch).
ACS402-5SB4
Fig. 6: RMS on-state current versus ambient
temperature.
P(W)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
IT(RMS)(A)
0.00
0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40
IT(RMS)(A)
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
0
4 switches ON
1 switch ON
Tamb(°C)
25 50 75
100 125
Fig. 7: Relative variation of thermal impedance
)junction to ambient versus pulse duration (device
t(smounted on printed circuit board FR4, e(Cu) =
35µm)
Fig. 8: Relative variation of gate trigger current
versus junction temperature.
roducZth(j-a)/Rth(j-a)
1E+0
lete P1E-1
o1 switch
bs1E-2
4 switches
t(s) - O1E-3
1E-4
1E-3
1E-2
tp (s)
1E-1 1E+0
1E+1
1E+2 5E+2
IGT [Tj] / IGT [Tj=25°C]
3.0
2.5
2.0
1.5
1.0
0.5
Tj(°C)
0.0
-40 -20 0 20 40 60 80 100 120 140
ducFig. 9: Relative variation of holding and latching
rocurrent versus junction temperature.
Fig. 10: Surge peak on-state current versus
number of cycles.
te PIH,IL [Tj] / IH,IL [Tj=25°C]
le2.0
o1.8
bs1.6
O1.4
ITSM(A)
6
5
4
t=20ms
One cycle
1.2 Non repetitive
Tj initial=25°C
1.0 3
0.8
0.6
0.4
0.2 Tj(°C)
0.0
-40 -20 0 20 40 60 80 100 120 140
2
Tamb=25°C
Repetitive
1
Number of cycles
0
1 10
100 1000
5/8
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ACS402-5SB4.PDF ] | |
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