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PDF AD5165 Datasheet ( Hoja de datos )

Número de pieza AD5165
Descripción 256-Position/ Ultralow Power 1.8 V Logic-Level Digital Potentiometer
Fabricantes Analog Devices 
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AD5165 datasheet

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AD5165 pdf
AD5165
ABSOLUTE MAXIMUM RATINGS
TA = +25°C, unless otherwise noted.1, 2
Table 3.
Parameter
VDD to GND
VA, VB, VW to GND
Maximum Current
IWB, IWA Pulsed
IWB Continuous (RWB ≤ 1 kΩ, A open)2
IWA Continuous (RWA ≤ 1 kΩ, B open)2
Digital Inputs and Output Voltage to GND
Operating Temperature Range
Maximum Junction Temperature (TJMAX)
Storage Temperature
Lead Temperature (Soldering, 10 – 30 sec)
Thermal Resistance2 θJA: TSOT-8
Value
–0.3 V to +7 V
VDD
±20 mA
±5 mA
±5 mA
0 V to +7 V
–40°C to +125°C
150°C
–65°C to +150°C
245°C
200°C/W
1 Maximum terminal current is bounded by the maximum current handling
of the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.
2 Package power dissipation = (TJMAX TA)/θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 16

5 Page

AD5165 arduino
TEST CIRCUITS
Figure 27 to Figure 33 illustrate the test circuits that define the test conditions used in the product specification tables.
AD5165
DUT
A
W
V+
B
V+ = VDD
1LSB = V+/2N
VMS
VIN
OFFSET
GND
2.5V
DUT
A
W
B
+15V
AD8610
–15V
VOUT
Figure 27. Test Circuit for Potentiometer Divider Nonlinearity Error
(INL, DNL)
NO CONNECT
DUT
AW
B
IW
VMS
Figure 28. Test Circuit for Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
Figure 31. Test Circuit for Gain vs. Frequency
DUT
W
B
RSW =
0.1V
ISW
CODE = 0x00
ISW 0.1V
GND TO VDD
Figure 32. Test Circuit for Incremental ON Resistance
VMS2
DUT
A
W
B
IW = VDD/RNOMINAL
VW
RW = [VMS1 – VMS2]/IW
VMS1
Figure 29. Test Circuit for Wiper Resistance
NC
DUT
VDD
A
W
GND B
ICM
VCM
NC NC = NO CONNECT
Figure 33. Test Circuit for Common-Mode Leakage Current
VA
VDD A
V+ W
B
( )V+= VDD 10%
PSRR (dB) = 20 LOG
VMS
V DD
PSS (%/%) = VMS%
VDD%
VMS
Figure 30. Test Circuit for Power Supply Sensitivity (PSS, PSSR)
Rev. 0 | Page 11 of 16

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