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Número de pieza ADP1148AN-33
Descripción High Efficiency Synchronous Step-Down Switching Regulators
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
High Efficiency Synchronous
Step-Down Switching Regulators
ADP1148, ADP1148-3.3, ADP1148-5
FEATURES
Operation From 3.5 V to 18 V Input Voltage
Ultrahigh Efficiency > 95%
Low Shutdown Current
Current Mode Operation for Excellent Line and Load
Transient Response
High Efficiency Maintained Over Wide Current Range
Logic Controlled Micropower Shutdown
Short Circuit Protection
Very Low Dropout Operation
Synchronous FET Switching for High Efficiency
Adaptive Nonoverlap Gate Drives
APPLICATIONS
Notebook and Palmtop Computers
Portable Instruments
Battery Operated Digital Devices
Industrial Power Distribution
Avionics Systems
Telecom Power Supplies
GPS Systems
Cellular Telephones
GENERAL DESCRIPTION
The ADP1148 is part of a family of synchronous step-down
switching regulator controllers featuring automatic sleep mode
to maintain high efficiencies at low output currents. These
devices drive external complementary power MOSFETs at
switching frequencies up to 250 kHz using a constant off-time
current-mode architecture.
FUNCTIONAL BLOCK DIAGRAM
ADP1148
ADJUSTABLE
PWR SIGNAL
VERSION
VIN P-DRIVE N-DRIVE GND GND SENSE(+) VFB SENSE(–)
31
14 12 11
89
7
SLEEP
S
VTH2
4
CT
NON-OVERLAP
DRIVE
1
QR
VTH1
S
T
2
R
QS
C
10mV to
150mV
OFF-TIME
CONTROL
VIN
SENSE(–)
VFB
6
ITH
V
B
13k
G
1.25V 100k
REFERENCE
10
SHUTDOWN
5
INT VCC
The constant off-time architecture maintains constant ripple
current in the inductor, easing the design of wide input range
converters. Current-mode operation provides excellent line and
load transient response. The operating current level is user
programmable via an external current sense resistor.
The ADP1148 incorporates automatic Power Saving Sleep
Mode operation when load currents drop below the level re-
quired for continuous operation. In sleep mode, standby power
is reduced to only about 2 mW at VIN = 10 V. In shutdown,
both MOSFETs are turned off.
+
1F
VIN (5.2V TO 18V)
10nF
VIN
INT VCC
P-DRIVE
0V = NORMAL
>1.5V = SHUTDOWN
ADP1148
SHUTDOWN
ITH SENSE(+)
RC
1k
CC
3300pF
CT SENSE(–)
CT N-DRIVE
470pF
S-GND P-GND
TYPICAL APPLICATIONS
CIN +
100F
P-CH
IRF7204
L* RSENSE**
62H 0.05
VOUT
5V/2A
1000pF
N-CH
IRF7403
C1
10BQ040
+ COUT
390F
*COILTRONICS CTX-68-4
**KRL SL-1-C1-0R050L
100
VIN = 6V
95
VIN = 10V
90
85
80
75
FIGURE 1 CIRCUIT
70
0.02
0.2
LOAD CURRENT – A
2
Figure 1. High Efficiency Step-Down Converter
Figure 2. ADP1148-5 Typical Efficiency
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997

1 page




ADP1148AN-33 pdf
Typical Performance Characteristics–ADP1148, ADP1148-3.3, ADP1148-5
200
150
100
50
0
0 1 2 345
MAXIMUM OUTPUT CURRENT – A
Figure 3. Selecting RSENSE vs. Maxi-
mum Output Current
1000
800
VSENSE = VOUT = 5V
600
400
VIN = 7V
200
VIN = 12V
VIN = 10V
0
0 100 200 300
FREQUENCY – kHz
Figure 4. Operating Frequency vs.
Timing Capacitor Value
1000
800
600
L = 50H
RSENSE = 0.02
L = 25H
RSENSE = 0.02
400
L = 50H
200 RSENSE = 0.05
0
01 234 5
(VIN–VOUT) VOLTAGE – V
Figure 5. Selecting Minimum Output
Capacitor vs. (VIN–VOUT) and Inductor
100
I 2R
GATE CHARGE
95
IQ
90
85
80
0.01
0.03 0.1 0.3 1.0
OUTPUT CURRENT – A
3.0
Figure 6. Typical Efficiency Losses
100
98
96
94 ILOAD = 1A
92
90
ILOAD = 100mA
88
86
84
82
FIGURE 1 CIRCUIT
80
0 4 8 12 16
INPUT VOLTAGE – V
20
Figure 7. Efficiency vs. Input Voltage
+40
+20
0
ILOAD = 0.1A
–20
ILOAD = 1A
–40
FIGURE 1 CIRCUIT
–60
0 4 6 8 10 12 14 16
VIN
Figure 8. ADP1148-5 Output Voltage
Change vs. Input Voltage
60
FIGURE 1 CIRCUIT
40
20
VIN = 6V
0
–20
VIN = 12V
–40
–60
0
0.5 1.0 1.5
2.0
LOAD CURRENT – A
2.5
Figure 9. Load Regulation
1.6
1.4 ACTIVE MODE
1.2
1.0
0.8
0.6
0.4
SLEEP MODE
0.2
0.0
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE – V
Figure 10. DC Supply Current
30
25
20
VSHUTDOWN = 2V
15
10
5
0
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE – V
Figure 11. Supply Current in Shutdown
REV. A
–5–

5 Page





ADP1148AN-33 arduino
ADP1148, ADP1148-3.3, ADP1148-5
Board Layout
When laying out the printed circuit board, the following check
list should be used to ensure proper operation of the ADP1148.
These items are also illustrated graphically in the layout diagram
of Figure 18. Check the following in your layout:
1) Are the signal and power grounds segregated? The ADP1148
SIGNAL GND (Pin 11) must return to the (–) plate of COUT.
The power ground returns to the source of the N-channel
MOSFET, anode of the Schottky diode, and (–) plate of CIN,
which should have as short lead lengths as possible.
2) Does the ADP1148 SENSE(–), (Pin 7), connect to a point
close to RSENSE and the (+) plate Of COUT? In adjustable
versions the resistive divider R1, R2 must be connected be-
tween the (+) plate of COUT and signal ground.
3) Are the SENSE(–) and SENSE(+) leads routed together with
minimum PC trace spacing? The 1000 pF capacitor between
Pins 7 and 8 should be as close as possible to the ADP1148.
4) Does the (+) plate of CIN connect to the source of the
P-channel MOSFET as closely as possible? This capacitor
provides the ac current to the P-channel MOSFET.
5) Is the input decoupling capacitor (1 µF) connected closely
between VIN (Pin 3) and POWER GND (Pin 12)? This
capacitor carries the MOSFET driver peak currents.
6) Is INTVCC (Pin 5) decoupled with a 10 nF capacitor to
signal ground?
7) Is the SHUTDOWN (Pin 10) actively pulled to ground
during normal operation? The Shutdown pin is high imped-
ance and must not be allowed to float.
To prevent noise spikes from erroneously tripping the current
comparator, a 1000 pF capacitor is needed across Sense(–) and
Sense(+).
P-CHANNEL
D1 CIN
VIN
1
P-DRIVE
2 NC
14
N-DRIVE
NC 13
1F 3
ADP1148
12
VIN POWER GND
CT
10nF
4
CT
5
3300pF
6
INT VCC
ITH
1k
7
SENSE(–)
11
SIGNAL GND
10
SHUTDOWN
9
VFB
8
SENSE(+)
N-CHANNEL
R1
R2
L
COUT
VOUT
RSENSE
1000pF
NC = NO CONNECT
R1, R2 OUTPUT DIVIDER REQUIRED
FOR ADJUSTABLE VERSION ONLY.
Figure 18. ADP1148 Layout Diagram (See Board Layout)
REV. A
–11–

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