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PDF ADM203 Data sheet ( Hoja de datos )

Número de pieza ADM203
Descripción CMOS RS-232 Driver/Receivers
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
FEATURES
120 kB Transmission Rate
ADM202: Small (0.1 F) Charge Pump Capacitors
ADM203: No External Capacitors Required
Single 5 V Power Supply
Meets EIA-232-E and V.28 Specifications
Two Drivers and Two Receivers
On-Board DC-DC Converters
؎9 V Output Swing with 5 V Supply
Low Power BiCMOS: 2.0 mA ICC
؎30 V Receiver Input Levels
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
High-Speed, 5 V, 0.1 F
CMOS RS-232 Driver/Receivers
ADM203
FUNCTIONAL BLOCK DIAGRAMS
5V INPUT
0.1F
6.3V
0.1F
16V
TTL/CMOS
INPUTS*
T1IN
T2IN
TTL/CMOS
OUTPUTS
R1OUT
R2OUT
C1+ +5V TO +10V VCC
VOLTAGE
C1– DOUBLER
V+
C2+ +10V TO –10V
VOLTAGE
C2– INVERTER
V–
T1
T2
R1
R2
GND ADM202
0.1F
6.3V
0.1F
6.3V
0.1F
16V
T1OUT
T2OUT
RS-232
OUTPUTS
R1IN
R2IN
RS-232
INPUTS**
GENERAL DESCRIPTION
The ADM202/ADM203 is a two-channel RS-232 line driver/
receiver pair designed to operate from a single 5 V power sup-
ply. A highly efficient on-chip charge pump design permits
RS-232 levels to be developed using charge pump capacitors as
small as 0.1 µF. The capacitors are internal to the package on
the ADM203 so no external capacitors are required. These
converters generate ± 10 V RS-232 output levels.
The ADM202/ADM203 meets or exceeds the EIA-232-E and
V.28 specifications. Fast driver slew rates permit operation up to
120 kB while high-drive currents allow for extended cable lengths.
An epitaxial BiCMOS construction minimizes power consump-
tion to 10 mW and also guards against latch-up. Overvoltage
protection is provided allowing the receiver inputs to withstand
continuous voltages in excess of ± 30 V. In addition, all pins
contain ESD protection to levels greater than 2 kV.
The ADM202 is available in 16-lead DIP and both narrow and
wide SOIC packages. The ADM203 is available in a 20-lead
DIP package.
*INTERNAL 400kPULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5kPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
5V INPUT
TTL/CMOS
INPUTS*
T1IN
T2IN
TTL/CMOS
OUTPUTS
R1OUT
R2OUT
DO NOT MAKE
CONNECTIONS
TO THESE PINS
INTERNAL
–10V POWER
SUPPLY
INTERNAL
+10V POWER
SUPPLY
VCC
T1
T2
R1
R2
C1+
C2+
C1–
C2+
V–
C2–
V– ADM203
C2–
V+ GND GND
T1OUT
T2OUT
RS-232
OUTPUTS
R1IN
R2IN
RS-232
INPUTS**
*INTERNAL 400kPULL-UP RESISTOR ON EACH TTL/CMOS INPUT.
**INTERNAL 5kPULL-DOWN RESISTOR ON EACH RS-232 INPUT.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001

1 page




ADM203 pdf
ADM203
GENERAL INFORMATION
The ADM202/ADM203 is an RS-232 drivers/receivers designed
to solve interface problems by meeting the EIA-232E specifica-
tions while using a single digital 5 V supply. The EIA standard
requires transmitters that will deliver ± 5 V minimum on the
transmission channel and receivers that can accept signal levels
down to ± 3 V. The parts achieve this by integrating step up
voltage converters and level shifting transmitters and receivers
onto the same chip. CMOS technology is used to keep the power
dissipation to an absolute minimum.
The ADM203 uses internal capacitors and, therefore, no exter-
nal capacitors are required.
The ADM202 contains an internal voltage doubler and a voltage
inverter which generates ± 10 V from the 5 V input. External
0.1 µF capacitors are required for the internal voltage converter.
The ADM202/ADM203 is a modification, enhancement and
improvement to the AD230–AD241 family and derivatives
thereof. It is essentially plug-in compatible and does not have
materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of three main sections. These are:
(a) A Charge Pump Voltage Converter
(b) RS-232 to TTL/CMOS Receivers
(c) TTL/CMOS to RS-232 Transmitters
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ± 10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated below. First, the 5 V
input supply is doubled to 10 V using capacitor C1 as the charge
storage element. The 10 V level is then inverted to generate
–10 V using C2 as the storage element.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies. On the ADM203, all capacitors
C1 to C4 are molded into the package.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
VCC
S1
GND
S2
INTERNAL
OSCILLATOR
C1
S3
C3
S4
V+ = 2VCC
VCC
V+
FROM
VOLTAGE
DOUBLER
GND
S1
S2
INTERNAL
OSCILLATOR
C2
S3
GND
C4
S4
V= (V+)
Figure 3. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is ± 9 V. Even under worst-case
conditions the drivers are guaranteed to meet the ± 5 V EIA-232-E
minimum requirement.
The input threshold levels are both TTL and CMOS compat-
ible with the switching threshold set at VCC/4. With a nominal
VCC = 5 V the switching threshold is 1.25 V typical. Unused
inputs may be left unconnected, as an internal 400 kpull-up
resistor pulls them high forcing the outputs into a low state.
As required by the EIA-232-E standard the slew rate is limited
to less than 30 V/µs without the need for an external slew limiting
capacitor and the output impedance in the power-off state is
greater than 300 .
Receiver Section
The receivers are inverting level shifters that accept EIA-232-E
input levels (± 5 V to ± 15 V) and translate them into 5 V TTL/
CMOS levels. The inputs have internal 5 kpull-down resistors
to ground and are also protected against overvoltages of up to
± 30 V. The guaranteed switching thresholds are 0.8 V minimum
and 2.4 V maximum which are well within the ± 3 V EIA-232
requirement. The low level threshold is deliberately positive
as it ensures that an unconnected input will be interpreted as
a low level.
The receivers have Schmitt trigger input with a hysteresis level
of 0.5 V. This ensures error free reception both for noisy inputs
and for inputs with slow transition times.
Figure 2. Charge Pump Voltage Doubler
REV. A
–5–

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