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PDF AT89LS53-12JC Datasheet ( Hoja de datos )

Número de pieza AT89LS53-12JC
Descripción 8-Bit Microcontroller with 12K Bytes Flash
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo

Total 30 Páginas
		
AT89LS53-12JC Hoja de datos, Descripción, Manual
AT89LS53
Features
Compatible with MCS-51Products
12K Bytes of In-System Reprogrammable Downloadable Flash Memory
- SPI Serial Interface for Program Downloading
- Endurance: 1,000 Write/Erase Cycles
2.7V to 6V Operating Range
Fully Static Operation: 0 Hz to 12 MHz
Three-Level Program Memory Lock
256 x 8 bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Nine Interrupt Sources
Programmable UART Serial Channel
SPI Serial Interface
Low Power Idle and Power Down Modes
Interrupt Recovery From Power Down
Programmable Watchdog Timer
Dual Data Pointer
Power Off Flag
Description
The AT89LS53 is a low-power, wide-voltage range, high-performance CMOS 8-bit
microcomputer with 12K bytes of downloadable Flash programmable and erasable
read only memory. The device is manufactured using Atmel’s high density nonvolatile
memory technology and is compatible with the industry standard 80C51 instruction
set and pinout. The on-chip downloadable Flash allows the program memory to be
reprogrammed in-system through an SPI serial interface or by a conventional nonvol-
atile memory programmer. By combining a versatile 8-bit CPU with downloadable
Flash on a monolithic chip, the Atmel AT89LS53 is a powerful microcomputer which
provides a highly flexible and cost effective solution to many embedded control appli-
cations.
The AT89LS53 provides the following standard features: 12K bytes of downloadable
Flash, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer, two Data Point-
ers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full
duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89LS53 is
designed with static logic for operation down to zero frequency and supports two soft-
ware selectable power saving modes. The Idle Mode stops the CPU while allowing
the RAM, timer/counters, serial port, and interrupt system to continue functioning. The
Power Down Mode saves the RAM contents but freezes the oscillator, disabling all
other chip functions until the next interrupt or hardware reset.
The downloadable Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a serial
programming interface and allows the program memory to be written to or read from
unless Lock Bit 2 has been activated.
8-Bit
Microcontroller
with 12K Bytes
Flash
AT89LS53
0851B-B–12/97
4-249

1 page

AT89LS53-12JC pdf
AT89LS53
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Special Function Registers
A map of the on-chip memory area called the Special Func-
tion Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoc-
cupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indeterminate
effect.
Table 1. AT89LS53 SFR Map and Reset Values
0F8H
0F0H
B
00000000
0E8H
0E0H
ACC
00000000
0D8H
0D0H
0C8H
PSW
00000000
T2CON
00000000
T2MOD
XXXXXX00
RCAP2L
00000000
RCAP2H
00000000
0C0H
0B8H
0B0H
0A8H
0A0H
98H
90H
88H
80H
IP
XX000000
P3
11111111
IE
0X000000
P2
11111111
SCON
00000000
P1
11111111
TCON
00000000
P0
11111111
SPSR
00XXXXXX
SBUF
XXXXXXXX
TMOD
00000000
SP
00000111
TL0
00000000
DP0L
00000000
TL1
00000000
DP0H
00000000
TL2
00000000
TH0
00000000
DP1L
00000000
SPCR
000001XX
TH2
00000000
TH1
00000000
DP1H
00000000
WCON
00000010
SPDR
XXXXXXXX
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
PCON
0XXX0000
87H
4-253

5 Page

AT89LS53-12JC arduino
AT89LS53
Figure 2 shows Timer 2 automatically counting up when
DCEN = 0. In this mode, two options are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to
0FFFFH and then sets the TF2 bit upon overflow. The over-
flow also causes the timer registers to be reloaded with the
16 bit value in RCAP2H and RCAP2L. The values in
RCAP2H and RCAP2L are preset by software. If EXEN2 =
1, a 16 bit reload can be triggered either by an overflow or
by a 1-to-0 transition at external input T2EX. This transition
also sets the EXF2 bit. Both the TF2 and EXF2 bits can
generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down,
as shown in Figure 3. In this mode, the T2EX pin controls
the direction of the count. A logic 1 at T2EX makes Timer 2
count up. The timer will overflow at 0FFFFH and set the
TF2 bit. This overflow also causes the 16 bit value in
RCAP2H and RCAP2L to be reloaded into the timer regis-
ters, TH2 and TL2, respectively.
A logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal the values stored in
RCAP2H and RCAP2L. The underflow sets the TF2 bit and
causes 0FFFFH to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or
underflows and can be used as a 17th bit of resolution. In
this operating mode, EXF2 does not flag an interrupt.
Figure 2. Timer 2 in Auto Reload Mode (DCEN = 0)
Table 9. T2MOD—Timer 2 Mode Control Register
T2MOD Address = 0C9H
Reset Value = XXXX XX00B
Not Bit Addressable
T2OE
DCEN
Bit 7 6 5 4 3 2 1 0
Symbol
T2OE
DCEN
Function
Not implemented, reserved for future use.
Timer 2 Output Enable bit.
When set, this bit allows Timer 2 to be configured as an up/down counter.
4-259

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