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PDF K6R4008V1B-L Data sheet ( Hoja de datos )
| Número de pieza | K6R4008V1B-L | |
| Descripción | 512K x8 Bit High Speed Static RAM | |
| Fabricantes | Samsung semiconductor | |
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K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
PRELIMINARY
CMOS SRAM
Document Title
512Kx8 Bit High Speed Static RAM(3.3V Operating).
Operated at Commercial and Industrial Temperature Ranges.
Revision History
RevNo. History
Rev. 0.0 Initial release with Design Target.
Draft Data
Jan. 1st, 1997
Rev. 1.0
Release to Preliminary Data Sheet.
1.1. Replace Design Target to Preliminary.
Jun. 1st, 1997
Rev. 2.0
Release to Final Data Sheet.
2.1. Delete Preliminary.
2.2. Add 30pF capacitive in test load.
2.3. Relax DC characteristics.
Item Previous
ICC
10ns
170mA
12ns
160mA
15ns
150mA
ISB f=max. 40mA
ISB1 f=0 10 / 1mA
IDR
VDR=3.0V
0.9mA
Current
205mA
200mA
195mA
50mA
10 / 1.2mA
1.0mA
Feb.11th.1998
Rev. 2.1
Change operating current at Industrial Temperature range.
Previous spec.
Changed spec.
Items
(10/12/15ns part)
(10/12/15ns part)
Icc
205/200/195mA
230/225/220mA
Jun.27th 1998
Rev. 2.2 Add 44 pins plastic TSOP(II) forward Package.
May. 4th 1999
Remark
Design Target
Preliminary
Final
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Rev 2.2
May 1999
1 page  
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K6R4008V1B-C/B-L, K6R4008V1B-I/B-P
PRELIMINARY
CMOS SRAM
AC CHARACTERISTICS(TA=0 to 70°C, VCC=3.3±0.3V, unless otherwise noted.)
TEST CONDITIONS*
Parameter
Value
Input Pulse Levels
0V to 3V
Input Rise and Fall Times
3ns
Input and Output timing Reference Levels
1.5V
Output Loads
See below
* The above test conditions are also applied at industrial temperature range.
Output Loads(A)
DOUT
ZO = 50Ω
Output Loads(B)
for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ
RL = 50Ω
VL = 1.5V
30pF*
DOUT
353Ω
+3.3V
319Ω
5pF*
* Capacitive Load consists of all components of the
test environment.
* Including Scope and Jig Capacitance
READ CYCLE*
Parameter
Symbol
K6R4008V1B-10
Min Max
Read Cycle Time
Address Access Time
Chip Select to Output
tRC 10
tAA -
tCO -
-
10
10
Output Enable to Valid Output
tOE -
Chip Enable to Low-Z Output
tLZ 3
Output Enable to Low-Z Output tOLZ 0
5
-
-
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Chip Selection to Power Up Time
tHZ
tOHZ
tOH
tPU
0
0
3
0
5
5
-
-
Chip Selection to Power DownTime tPD
-
15
* The above parameters are also guaranteed at industrial temperature range.
K6R4008V1B-12
Min Max
12 -
- 12
- 12
-6
3-
0-
06
06
3-
0-
- 12
K6R4008V1B-15
Min Max
15 -
- 15
- 15
-7
3-
0-
07
07
3-
0-
- 15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-5-
Rev 2.2
May 1999
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet K6R4008V1B-L.PDF ] | |
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