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PDF EM78P153B Data sheet ( Hoja de datos )

Número de pieza EM78P153B
Descripción 8-Bit Microcontroller
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo



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EM78P153B
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.4
ELAN MICROELECTRONICS CORP.
April 2016

1 page




EM78P153B pdf
EM78P153B
8-Bit Microcontroller with OTP ROM
1 General Description
The EM78P153B is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS
technology. The device has an on-chip 102413-bit Electrical One Time Programmable Read Only Memory
(OTP-ROM). It provides three protection bits to prevent intrusion of user’s OTP memory code. Fifteen code
option bits are also available to meet user’s special requirements.
With enhanced OTP-ROM features, the EM78P153B provides a convenient method of developing and
verifying users programs. Moreover, this OTP device offers easy and effective program updates with the
use of development and programming tools. You can avail of ELAN’s Writer to easily program your
development codes.
2 Features
CPU Configuration
1k 13 bits on-chip ROM
32 8 bits on-chip registers (SRAM, general
purpose)
5-level stacks for subroutine nesting
Less than 1.5 mA at 5V / 4 MHz
Typically 15 µA at 3V / 32kHz
Typically 1 µA during Sleep mode
I/O Port Configuration
2 bidirectional I/O ports : P5, P6
12 I/O pins
Wake-up port : P6
6 Programmable pull-down I/O pins
7 programmable pull-high I/O pins
7 programmable open-drain I/O pins
External interrupt : P60
Operating Voltage Range:
2.3V ~ 5.5V at 0 ~ 70C (Commercial Grade)
Operating Frequency Range (Base on 2 clocks):
Crystal Mode:
DC ~ 20 MHz / 2clks @ 5V
DC ~ 8 MHz / 2clks @ 3V
DC ~ 4 MHz / 2clks @ 2.3V
The transient point of system frequency
between HXT and LXT is 400kHz.
ERC Mode:
DC ~ 2MHz / 2clks @ 2.1V
IRC Mode:
Oscillation Mode: 4 / 8 / 1MHz and 455kHz
Process Deviation: Type: Max. ± 3%
Temperature Deviation: ± 2% (0 ~ 70°C)
Internal
RC Freq. Temp.
(0~70C)
Drift Rate
Voltage
Process Total
4 MHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
8 MHz ±1.5% ±8%@3.0~5.5V ±2% ±11.5%
1 MHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
455kHz ±1.5% ±8%@2.3~5.5V ±2% ±11.5%
Peripheral Configuration
8-bit real time clock / counter (TCC) with selective
signal sources, trigger edges, and overflow
interrupt
Power on reset and 3 programmable level voltage
reset
POR: 1.8V (Default), LVR: 4.0, 3.5, 2.7V
2- / 4- clocks per instruction cycle selected by code
option
Three Available Interrupts:
TCC overflow interrupt
Input-port status changed interrupt (Wake-up from
Sleep mode)
External interrupt
Special Features
Programmable free running watchdog timer
Power saving Sleep mode
Selectable oscillation mode
Programmable prescaler of oscillator set-up time
Package Type:
14-pin DIP 300mil : EM78P153BD14
14-pin SOP 150mil : EM78P153BSO14
10-pin SSOP 150mil : EM78P153BSS10
NOTE
These are all Green Products which do not contain hazardous substances.
Product Specification (V1.4) 04.25.2016
(This specification is subject to change without prior notice)
1

5 Page





EM78P153B arduino
EM78P153B
8-Bit Microcontroller with OTP ROM
5.1.7 RF (Interrupt Status Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
- - - - - EXIF ICIF TCIF
Bits 7 ~ 3: Not used. Set to “0” all the time.
Bit 2 (EXIF): External Interrupt Flag. Set by a falling edge on /INT pin, reset by
software.
0: No interrupt occurs
1: Interrupt is requested
Bit 1 (ICIF): Port 6 input status change interrupt flag. Set when Port 6 input changes,
reset by software.
0: No interrupt occurs
1: Interrupt is requested
Bit 0 (TCIF): TCC Overflow Interrupt Flag. Set when TCC overflows, reset by
software.
0: No interrupt occurs
1: Interrupt is requested
NOTE
RF can be cleared by instruction but cannot be set.
IOCF is the interrupt mask register.
The result of reading RF is the "logic AND" of RF and IOCF.
5.1.8 R10 ~ R2F
These are all 8-bit general-purpose registers.
5.2 Special Function Registers
5.2.1 A (Accumulator)
Internal data transfer operation, or instruction operand holding usually involves the
temporary storage function of the Accumulator; which is not an addressable register.
5.2.2 CONT (Control Register)
Bit 7
GP
Bit 6
/INT
Bit 5
TS
Bit 4
TE
Bit 3
PAB
Bit 2
PSR2
Bit 7 (GP): General purpose register
Bit 6 (/INT): Interrupt Enable flag
0: Masked by DISI or hardware interrupt
1: Enabled by ENI/RETI instructions
Bit 1
PSR1
Bit 0
PSR0
Product Specification (V1.4) 04.25.2016
(This specification is subject to change without prior notice)
7

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