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PDF EM78P134N Data sheet ( Hoja de datos )

Número de pieza EM78P134N
Descripción 8-Bit Microcontroller
Fabricantes ELAN Microelectronics 
Logotipo ELAN Microelectronics Logotipo



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No Preview Available ! EM78P134N Hoja de datos, Descripción, Manual

EM78P134N
8-Bit Microcontroller
with OTP ROM
Product
Specification
DOC. VERSION 1.6
ELAN MICROELECTRONICS CORP.
June 2010

1 page




EM78P134N pdf
Contents
7 Electrical Characteristics ....................................................................................... 52
7.1 DC Electrical Characteristics............................................................................ 52
7.2 Comparator Characteristics.............................................................................. 54
7.3 AC Electrical Characteristics ............................................................................ 55
8 Timing Diagram ....................................................................................................... 56
Doc. Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
Specification Revision History
Revision Description
Initial version
Modified the package type description
Added description of RC Bit 7
Corrected some description error
Modified the DC electrical characteristics
Modified the operation voltage range
Added SSOP10 package type
Date
2008/08/11
2008/11/04
2008/11/12
2009/02/02
2009/03/23
2009/08/10
2010/06/02
Product Specification (V1.6) 06.02.2010
v

5 Page





EM78P134N arduino
EM78P134N
8-Bit Microcontroller with OTP ROM
5.1 Operational Registers
5.1.1 R0 (Indirect Addressing Register)
R0 is not a physically implemented register. It is used as an indirect addressing
pointer. Any instruction using R0 as a pointer actually accesses data pointed by the
RAM Select Register (R4).
5.1.2 R1 (Timer Clock/Counter)
„ Incremented by an external signal edge, through the TCC pin, or by the instruction
cycle clock.
„ External signal of TCC trigger pulse width must be greater than one instruction.
„ The signals to increase the counter are determined by Bit 4 and Bit 5 of the CONT
register.
„ Writable and readable as any other registers.
5.1.3 R2 (Program Counter) and Stack
„ Depending on the device type, R2 and hardware stack are 10-bit wide. The
structure is depicted in the following figure.
PC (A9~A0)
Reset vector
Interrupt vector
000H
003H
00FH
Stack level 1
Stack level 2
Stack level 3
Stack level 4
Stack level 5
On-chip program
Memory
3FFH
Figure 5-2 Program Counter Organization
„ The configuration structure generates 1K×13 bits on-chip OTP ROM addresses to
the relative programming instruction codes. One program page is 1024 words
long.
„ R2 is set as all "0" when under Reset condition.
„ "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,
"JMP" allows the PC to go to any location within a page.
Product Specification (V1.6) 06.02.2010
(This specification is subject to change without further notice)
5

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